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Thin film transistor, array substrate, manufacturing method of array substrate and display device

A technology of thin film transistors and array substrates, applied in the field of display, can solve problems such as defective products, and achieve the effects of avoiding dark spots, avoiding short circuits, and reducing distances

Pending Publication Date: 2018-01-19
BOE TECH GRP CO LTD +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The present application provides a thin film transistor, an array substrate, a manufacturing method thereof, and a display device, which can solve the problem that the existing generated TFT is prone to defective products

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Embodiment Construction

[0080] In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0081] Please refer to figure 1 , figure 1 It is a schematic structural diagram of an array substrate provided in the prior art. The array substrate 00 may include: a glass substrate 01, a light-shielding layer pattern 02, a buffer layer 03, an active layer pattern 04, and a gate insulating layer arranged in sequence on the glass substrate 01. Layer 05, gate pattern 06, intermediate insulating layer 07, source-drain pattern 08, flat layer 09, pixel electrode pattern 010, passivation layer 011 and common electrode pattern 012. When the PPI of the array substrate 00 needs to be increased, the distance d0 between the source 08a and the drain 08b in the source-drain pattern 08 can be reduced.

[0082] Usually, the source electrode 08a an...

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Abstract

The invention discloses a thin film transistor, an array substrate, a manufacturing method of the array substrate and a display device, and belongs to the technical field of display. The thin film transistor comprises a gate pattern, an active layer pattern, a gate insulating layer, a first conductive pattern, a second conductive pattern and a first middle insulating layer, the gate insulating layer is positioned between the gate pattern and the active layer pattern, the first middle insulating layer is positioned between the first conductive pattern and the second conductive pattern, the first conductive pattern and the second conductive pattern are a source pattern and a drain pattern, a first via hole is formed in the first middle insulating layer, and the second conductive pattern is connected with the active layer pattern through the first via hole. As the first middle insulating layer is arranged between the source pattern and the drain pattern, short connection of a source and adrain is effectively avoided, and the thin film transistor is used for the display device.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a thin film transistor, an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] With the development of the field of display technology, various products with display functions appear in daily life, such as mobile phones, tablet computers, televisions, notebook computers, digital photo frames, navigators, virtual reality (English: Virtual Reality; abbreviation: VR ), etc., these products all need to be assembled with display panels without exception. [0003] At present, most display panels can include an array substrate, a color filter substrate, and a liquid crystal layer between the array substrate and the color filter substrate. The array substrate includes a base substrate and a plurality of thin film transistors arranged in an array formed on the base substrate. (English: Thin Film Transistor; TFT for short). For VR product...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/786H01L27/12H01L21/336
CPCH01L29/78633H01L29/78606G02F1/136209G02F1/13685H01L27/124H01L27/1248H10K59/124G02F1/136227G02F1/1368H01L27/1244H01L27/1259
Inventor 李磊樊君李付强刘泰洋
Owner BOE TECH GRP CO LTD
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