Binary FPRM circuit area and delay comprehensive optimization method
A technology of circuit area and optimization method, applied in multi-objective optimization, electrical digital data processing, special data processing applications, etc., can solve problems such as poor circuit optimization effect and premature convergence of algorithms
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[0061] Embodiment: a kind of binary FPRM circuit area and time-delay comprehensive optimization method comprise the following steps:
[0062] ① Establish the area estimation model and delay estimation model of the binary FPRM circuit under p polarity:
[0063] ①-1 Express the binary FPRM circuit under p-polarity using the binary FPRM logic expression as:
[0064]
[0065] Among them, n is the function f p (x n-1 ,x n-2 ,...,x 0 ) the number of input variables; x n-1 ,x n-2 ,...,x 0 for the function f p (x n-1 ,x n-2 ,...,x 0 ) of n input variables, is the symbol of XOR operation, b j is the AND coefficient, and b j ∈{0,1}; j is the ordinal number of the AND item, and j is greater than or equal to 0 and less than or equal to 2 n An integer of -1, which can be expressed as j in binary n-1 j n-2 … j 0 ;p is the polarity of the binary FPRM circuit, which can be expressed as p in binary n-1 p n-2 …p 0 ; j is the AND expansion, expressed as i is an integer ...
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