Bufferable mode verification method

Abstract

The invention discloses a Bufferable mode verification method which includes the steps: connecting a designed write address channel, a write data channel and a write response channel to be tested witha verification platform; defining parameters according to verification requirements; performing sampling by a clock and storing information of a Master end write request and information on a Slave end write response channel; building a response channel conversion module, arranging the information stored at a Slave end and then returning the information to a Master end; transmitting the information to a score indicator by the Master end, taking a return time point as a data comparison trigger condition by the score indicator, fitting data of a write request by address information and ID (identification) information, comparing the data with data of the Slave end at the same address, and verifying data correctness. The verification method has the advantage that write operation of the Bufferable mode and a Non-Bufferable mode can be verified.

Description

technical field [0001] The invention relates to the field of advanced extensible interface (Advanced eXtensible Interface, AXI) bus technology, in particular to a verification method of a Bufferable mode. Background technique [0002] The Bufferable mode is a solution proposed by the Advanced Microcontroller Bus Architecture (AMBA) AXI bus protocol to improve the efficiency and performance of write operations, specifically: when a write request occurs, Awcache[3: 0], the lowest bit is set to 1, indicating that the write request is in Bufferable mode, and the system will allow the write request to be completed at any time. In the design of the Cache coherence system, when a write request occurs, by using this scheme, the write Response can be returned in advance to notify the write request initiator that the write operation is completed and the next request can be applied. [0003] With the rapid development of chip technology, there is a higher demand for chip performance a...

AI Technical Summary

Problems solved by technology

In fact, the write operation is not actually completed, and the data is temporarily stored in the Buffer of the bus. If the Memory data is compared at this time, the new data of the write channel will be compared with the old data in the Memory. ; What's more, if the consistency system design includes multiple Master write channels, and Bufferable and Non-Bufferable are used at the same time, the verification platform cannot perform normal data comparison work without processing

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