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A Fast Log Block Hit Method for nand FLASH

A log and fast technology, applied in the direction of memory address/allocation/relocation, instrumentation, calculation, etc., can solve problems that affect system reading performance, long time, large amount of calculation, etc., to improve search accuracy, hit speed, The effect of increasing the running speed

Active Publication Date: 2020-07-03
BEIJING MXTRONICS CORP +1
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Such a search method requires a large amount of calculation and takes a long time, which affects the read performance of the system.

Method used

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  • A Fast Log Block Hit Method for nand FLASH
  • A Fast Log Block Hit Method for nand FLASH
  • A Fast Log Block Hit Method for nand FLASH

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Embodiment Construction

[0030] The present invention overcomes the deficiencies of the prior art and provides a fast log block hit method for NAND FLASH, which reduces system memory consumption and can quickly hit log blocks, improves system response speed, and reduces resource overhead and time for searching log blocks Consumption, improved the performance of flash memory processor, a kind of log block fast hit method for NAND FLASH of the present invention, comprises the steps:

[0031] Step 1: When the log block is to be quickly searched, according to the LBA address LADDR of the target sector, the values ​​of SLAP and LNP corresponding to LADDR are calculated, assuming SLAP=X, LNP=Y, wherein, SLAP is the value of the page where the target sector is located Address, LNP is the sector offset address of the target sector in the page; the NAND FLASH includes at least 1 logic block, each logic block includes at least 1 page, and each page includes page redundancy area, valid data area, the valid data ...

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Abstract

A log block rapid hitting method for an NAND FLASH includes the steps of establishing an LOPB in a system memory, continuously adding LPA to the LOPB when data is written to an LOG block, calculatinga page offset address according to an LBA address LADDR of a target sector in the data reading process, finding the LPA of the corresponding LOPB, starting to conduct traversing from a certain node torapidly and accurately find a page address in the log block for storing the page deviation address the same as the target LADDR, and further calculating whether the target LADDR is hit in the page ornot according to the find address information of a page redundancy area. By means of the method, the consumption of the system memory is reduced, the log block can be rapidly hit, the system responsespeed is improved, the resource expenditures and time consumption for finding the log block are reduced, the performance of a flash processor is improved, and the method has actual significance in anon-chip system with limited system memory resources.

Description

technical field [0001] The invention relates to the field of NAND FLASH storage management, in particular to a log block fast hitting method for NAND FLASH. Background technique [0002] At present, relatively mainstream SSDs are all based on NAND FLASH media. One of the keys to the FTL algorithm is address mapping, and hybrid mapping is one of the methods. The field and direction of the present invention are data lookups for log blocks (LOG blocks) in hybrid mapping mechanisms. At present, the basic unit of NAND FLASH erasing operation is block, while the basic unit of reading and writing is page. The smallest unit for reading and writing data from a host to an SSD is a sector. The host needs to perform a block erase operation before changing the written sector data. In order to achieve local wear balance and improve write performance, the NAND FLASH block is divided into a DATA block and a LOG block. When the data in the DATA block area needs to be changed, in order to ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/02
CPCG06F12/0246G06F12/0292
Inventor 赵微张志永宗宇谢俊玲谷羽刘银萍
Owner BEIJING MXTRONICS CORP
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