OPC (Optical Proximity Correction) method for reducing running time of program of CT layer

Abstract

The invention provides an OPC (Optical Proximity Correction) method for reducing the running time of a program of a CT layer. The OPC method comprises the following steps: dividing a layout of a maskinto three parts including an SRAM core area, an SRAM boundary area and a LOGIC area; respectively marking graphs in an SRAM into marked segments according to difference of environment; respectively moving the segments marked in the SRAM core area to designated positions and fixing; selecting segments in the SRAM boundary area, and regulating the positions of the segments, thus reducing the consistency of the mask on the SRAM boundary area to be within a set range; respectively classifying and segmenting graphs in the LOGIC area according to feature size, width and space, and setting differentinitial movement amounts for the segments under different conditions. According to the OPC method provided by the invention, on the premise that the key size of the mask in an SRAM area is enabled not to change, an OPC iteration number is effectively reduced, and resources of hardware and software which are required for OPC publishing are reduced.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to an OPC correction method for reducing the running time of a connection hole layer program. Background technique [0002] In the deep submicron semiconductor manufacturing process, as the feature size continues to decrease and the pattern complexity becomes higher and higher, the optical proximity correction (Optical Proximity Correction, referred to as OPC) technology has been widely used in the reticle of each key level. In publishing. The most widely used OPC method at present is the OPC correction method based on the model. Its basic principle is to simulate the original layout or the target layout by establishing an exposure model based on specific lithography conditions to obtain the simulation error, and then the original layout according to a certain Segmentation is carried out according to the rules, and the offset compensation and re-sim...

AI Technical Summary

Problems solved by technology

Although increasing the number of OPC iterations can obtain more ideal OPC results to a certain extent, but the connection hole layer occupies too much OPC resources, which will cause other layers to bear greater pressure due to insufficient resources during tape-out

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