SAB process method for semiconductor devices

Abstract

The invention discloses a SAB process method of a semiconductor device, comprising steps: Step 1, forming a gate structure and a source-drain region of a semiconductor device; Step 2, determining the required thickness of the SAB film layer and combining the spacing of the polysilicon gate to adjust the SAB film The layer formation process is split: the thickness of each SAB sub-film layer ensures that no gaps are formed between the polysilicon gates; after that, the SAB sub-film layer is photolithographically etched, and the SAB sub-film in the area where metal silicide needs to be formed layer removal and achieve sufficient etching of the SAB sub-film layer between the polysilicon gates to prevent voids from appearing in the subsequent thin film formation process; the present invention can not generate between the polysilicon gates of the semiconductor device during the formation of the SAB film layer Holes, so that the SAB film layer between the polysilicon gates can be fully etched, so that the SAB process does not affect the spacing of the polysilicon gates, thereby facilitating the filling of the thin film.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a SAB process method for a semiconductor device. Background technique [0002] With the rapid development of mobile communications, display technology has also advanced rapidly. Due to the pursuit of higher resolution, larger capacity and larger size, higher requirements are placed on LCD display drivers. Among them, in order to meet the demand for larger capacity, it is necessary to continuously increase the capacity of the embedded SRAM on the basis of ensuring that the chip area remains unchanged, so it is necessary to continuously reduce the SRAM area, such as the SRAM area from 379μm 2 Shrink to 305μm 2 . The area reduction mainly starts with reducing the distance between the polysilicon gates of semiconductor devices, mainly MOS transistors. Usually, side walls need to be formed on the side of the polysilicon gate. Oxide layer sidewalls ar...

AI Technical Summary

Problems solved by technology

The area reduction mainly starts with reducing the distance between the polysilicon gates of semiconductor devices, mainly MOS transistors. Usually, side walls need to be formed on the side of the polysilicon gate. Oxide layer sidewalls are formed. After the formation of double-layer sidewalls, the spacing between polysilicon gates will become smaller. Too small spacing between polysilicon gates will lead to voids (Void) in subsequent film filling.

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