Packaging structure and manufacturing method thereof
A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of thin package thickness and volume, electromagnetic wave interference, etc., achieve thin package thickness and volume, and avoid electromagnetic wave interference. Effect
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[0089] figure 1 A cross-sectional schematic diagram of a package structure according to an embodiment of the present invention is shown. Please refer to figure 1 In this embodiment, the package structure 10a includes a circuit substrate 100, a first build-up wiring structure 200, a second build-up wiring structure 300, and a plurality of piezoelectric heat dissipation units 400. The circuit substrate 100 includes a core layer 110, a plurality of electronic components ( figure 1 Three electronic components 120a, 120b, 120c) and a conducting unit 130 are schematically shown in FIG. The core layer 110 has a first surface 112 and a second surface 114 opposite to each other. The electronic components 120a, 120b, 120c are embedded in the core layer 110, and each of the electronic components 120a (or 120b, 120c) has an active surface 122a (or 122b, 122c) and a back surface 124a (or 124b, 124c), and the active surfaces 122a, 122b (or 122a, 122c) of two adjacent electronic components 1...
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