Dual-redundancy hot backup CPU system suitable for airborne computers

An airborne computer, dual-redundancy technology, applied in computing, hardware redundancy for data error detection, program control design, etc., can solve problems such as failure to realize single-machine single-channel CPU multi-core processing strategy, and achieve improvement The effect of task reliability

Active Publication Date: 2018-05-11
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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AI Technical Summary

Problems solved by technology

[0004] The traditional electromechanical management computer usually solves the redundancy problem in a multi-machine and multi-channel manner. The running status of the local channel of the machine can only be monitored through other channels, and the single-machine single-channel CPU multi-core processing strategy cannot be realized.

Method used

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  • Dual-redundancy hot backup CPU system suitable for airborne computers

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Embodiment

[0017] When the power is turned on, the initial state of the peripheral enable signal of the dual CPU is off. When the software of the dual-machine is initialized, the master control instruction "0" is written to the specific address through a specific data bit, so that the status of the peripheral enable signal of the dual-machine CPU module is "0", and the dual-machine has no control over the external device output. After the system task is started, the two machines immediately write the master control instruction "1" to the specific address. Since the control logic uses a random number to delay the master control enable command, the two machines start successively, and the one that starts first is called The master, and the one that starts later is the slave. After startup, the state of the peripheral enable signal of the host CPU module becomes "1" (here, the watchdog signal is first set to high level, and the hardware has no serious failure), and the host CPU module enab...

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Abstract

The invention belongs to the technical field of computer applications, and relates to a dual-redundancy hot backup CPU system for improving task reliability of airborne computers. The system comprisesdual-redundancy CPUs; after the system is started, both the dual-redundancy CPUs keeps an idle state; after software initiation is finished, two CPUs enables CPU output control through a main controlinstruction of writing specific addresses; the main control instruction comprises a delay processing control logic for deciding starting sequences of the two CPUs; an enable signal of a firstly started CPU module is set to be effective and obtain an output control right; the enable signal is connected to a channel logic fault circuit of the secondly started CPU; and the secondly started CPU is suppressed by the enable signal of the started CPU module to be located in an ineffective state. The dual-redundancy hot backup CPU system suitable for airborne computers is high in reliability and is capable of carrying out coordination.

Description

technical field [0001] The invention belongs to the field of computer application technology, and relates to a dual-redundancy hot-backup CPU system designed to improve the task reliability of an airborne computer. Background technique [0002] With the continuous improvement of the integration of airborne electronic equipment, the task reliability of the airborne computer will directly affect the flight safety of the aircraft. Once the airborne computer runs incorrectly, it will cause huge loss of life and property. [0003] At present, the integration of airborne computers is getting higher and higher. For example, the important electromechanical management system on the aircraft integrates subsystems with high real-time requirements such as environmental control, fuel, power supply, and hydraulic pressure. This requires the electromechanical management computer to have high Real-time processing capability. The CPU is the control core and computing core of the entire elec...

Claims

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Application Information

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IPC IPC(8): G06F9/4401G06F11/20G06F11/30
CPCG06F9/4405G06F11/202G06F11/3024
Inventor 吴斌蔡晓乐任晓琨向桂林刘夏青车炯晖
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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