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Time-interleaved data conversion with precise clocking enabled

A clock signal, signal conversion technology, applied in the direction of analog/digital conversion, analog-to-digital converter, digital-to-analog converter, etc.

Active Publication Date: 2021-06-04
RAYTHEON CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Converting these high-frequency analog signals into digital values ​​for real-time processing is challenging

Method used

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  • Time-interleaved data conversion with precise clocking enabled
  • Time-interleaved data conversion with precise clocking enabled
  • Time-interleaved data conversion with precise clocking enabled

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Embodiment Construction

[0016] This document discusses systems and methods for converting electrical RF signals into digital data. Accurate conversion of multi-GHz analog signals to digital data is a goal of radar systems, imaging systems, and communication systems. The conversion of the signal requires a high sampling rate of an analog-to-digital converter (ADC) circuit. The high frequency of RF analog signals can cause analog-to-digital A / D conversion to be the limiting factor in system performance. One way to increase the sampling rate of an ADC is to time interleave a set of ADC circuits operating at a lower sampling rate and combine the outputs of the set of ADCs to achieve a higher effective sampling rate. However, time interleaving imposes stringent timing and synchronization requirements on both the timing clock circuits and the timing clock's distribution network.

[0017] Conventional approaches for high-rate data converters use phase-locked loops, delay-locked loops, and on-chip clock si...

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Abstract

An apparatus comprising: a photonic oscillator circuit configured to generate an optical signal separated by a uniform delay; radio frequency (RF) generating circuitry configured to receive the optical signal and generate a series of reference clock signals having the same clock signal frequency, wherein each reference clock signal in the series includes a uniform delay relative to the previous clock signal in the series; and a plurality of analog-to-digital converter (ADC) circuits, wherein the ADC circuits include directly received sequential A signal input for an RF input signal, and a clock input for receiving a reference clock signal in a series of repeating reference clock signals, wherein the ADC circuit is configured to sample the RF input signal at the frequency of the reference clock signal with a uniform delay , representing the interleaved digital value of the RF signal in samples.

Description

[0001] priority claim [0002] This application claims the benefit of priority to US Application Serial No. 14 / 921,157, filed October 23, 2015, which is incorporated herein by reference in its entirety. Background technique [0003] Analysis of radio frequency (RF) analog signals is desirable in applications such as radar systems, imaging systems, and RF communication systems. RF analog signals can be converted to digital values, and the digital values ​​can be processed and analyzed using signal processing equipment. The RF signal of interest may have a signal frequency of several gigahertz (GHz). Converting these high-frequency analog signals to digital values ​​for real-time processing is challenging. Contents of the invention [0004] This document generally deals with the conversion of electrical RF and microwave signals to data. An example method includes generating a repeating series of reference clock signals using a photonic oscillator, wherein each reference clo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/06H03M1/08H03K3/42G02F7/00H03M1/12H03M1/66
CPCH03K3/42H03M1/0624H03M1/0836H03M1/1215H03M1/662H03K5/13H01S3/1303H01S3/1305H01S3/1307G02F7/00
Inventor S·R·威尔金森B·夏米
Owner RAYTHEON CO