Dynamic voltage adjusting system and method

A technology of dynamic voltage adjustment and power adjustment, which is applied in data processing power supply, electrical digital data processing, instruments, etc. It can solve the problems of long detection and adjustment time and complex implementation, so as to improve power supply efficiency, reduce power supply voltage, and adjust time short effect

Pending Publication Date: 2018-06-15
苏州芯算力智能科技有限公司
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  • Application Information

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Problems solved by technology

[0004] However, the above two schemes have the problems of long detection and

Method used

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  • Dynamic voltage adjusting system and method

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Embodiment Construction

[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the present invention.

[0044] The dynamic voltage adjustment system and the adjustment method disclosed in the present invention achieve a better effect of reducing the energy consumption of the chip by reducing the voltage to the greatest extent under the condition of a fixed frequency.

[0045] Combine figure 1 with figure 2 As shown, the dynamic voltage adjustment system disclosed in the embodiment of the present invention is a high-performance computing system (HPC system), which includes: a main controller, a power management chip, and at least one arithmetic chip. The core part of the HPC system is used for data calculations, such as tensor operations, encryption operations, etc. Combine image 3 As shown, the arithmetic chip is generally a chip including at least one built-in arithmetic core (that is, ar...

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Abstract

The invention discloses a dynamic voltage adjusting system and method. The system comprises a main controller, a power management chip and at least one calculation chip. The calculation chips are usedfor sending calculation error signals to the main controller when it is detected that the error rate of the calculation result exceeds a preset threshold value. The main controller is used for sending a power adjusting command to the power management chip according to the calculation error information and adjusting the power voltages of the calculation chips. Under the fixed frequency, by reducing the voltages, the power consumption of the chips is controlled, and the supply voltages of the chips are reduced to the maximum extent; through hardware detecting, the voltage detection and adjustment time can be greatly shortened, and the power efficiency of the chips and the system is improved.

Description

Technical field [0001] The invention relates to a dynamic voltage adjustment technology, in particular to a dynamic voltage adjustment system and an adjustment method for controlling power consumption by dynamically reducing voltage. Background technique [0002] With the development of integrated circuit technology, the scale of chips has become larger and larger, and power consumption has become an increasingly important issue in integrated circuit design. The dynamic voltage frequency adjustment (Dynamic Voltage Freque ncy Scaling, referred to as DVFS) technology is currently a dynamic voltage frequency adjustment technology widely used in the semiconductor field. DVFS technology specifically dynamically adjusts the operating frequency and voltage of the chip to achieve energy saving purpose. This technology is currently increasingly being used in high-performance computing (HPC) systems, such as multi-core central processing units (CPU), tensor processors (TPU), and virtual ...

Claims

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Application Information

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IPC IPC(8): G06F1/32
CPCG06F1/3296
Inventor 李彦宏
Owner 苏州芯算力智能科技有限公司
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