Method and system for double-precision floating-point square root operation

Abstract

The present invention relates to a method and system for double-precision floating-point square root operation, comprising: step 1, decomposing a 64-bit double-precision floating-point number into a sign bit, an order and a mantissa, and judging the positive or negative of the number to be rooted based on the sign bit Value, judge the order code parity of the number to be extracted based on the order, shift the mantissa according to the order code parity, and store the sign bit and the calculated order code in RAM; Step 2, put the number to be extracted The mantissa part is input into the square root module, and the amplified 106-bit fixed-point number is subjected to the square root calculation through the CORDIC algorithm, and the correction coefficient K value is processed in the FPGA through a shift operation, and the auxiliary parameter COMPLE is calculated according to the mantissa size. At the same time, in the 106-bit In the fixed-point arithmetic operation of , repeat iterations are performed during part of the iterative operation (i, 3i+1 times); step 3, the arithmetic square root of the output mantissa, after isolating the special value, is combined with the sign bit and the exponent code in the RAM, Complete the square root operation of the double-precision floating-point number. Through the present invention, the computing efficiency can be greatly improved.

Description

technical field [0001] The invention belongs to the application field of digital signal processing, and relates to an algorithm of square root operation of a double-precision floating-point number and a realization method thereof. Background technique [0002] In modern digital signal processing, addition, subtraction, multiplication and division are the most frequently used operations. Although the square root operation is not as widely used as the above-mentioned operations, as a basic mathematical operation, it still has important applications in engineering practice, such as trigonometry, quadratic equation solving, numerical analysis, probability statistics, image processing In other fields, there are many different algorithms for square root calculation, for example, Newton iterative method, SRT-redundant algorithm, non-redundant algorithm, CORDIC algorithm, etc. After analysis, this design adopts the algorithm of Coordinate Rotation Digital Computer (CORDIC), which i...

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Problems solved by technology

Usually due to the complex implementation logic and large resource usage, the SRT-redundant algorithm and non-redundant algorithm are not suitable in practice, and the Newton iteration method and CORDIC algorithm are most used

[0004] In the literature "Single Precision Floating-Point Number Square Root Algorithm Design and FPGA Implementation", the square root mean value theorem algorithm is used to complete the fixed-point number square root operation of the mantissa part. This algorithm is clear in principle and easy to implement, but its iterations increase with The bit width of the fixed-point number to be squared increases exponentially, and its maximum realized bit width is 16 bits, which is difficult to meet the square root requirements of double-precision floating-point numbers

The literature "Research and Design of CORDIC Algorithm Based on Floating-Point Numbers" uses the CORDIC algorithm, and the design content includes not only the square root operation, but also other trigonometric functions and some linear operations, but its design is based on single-precision floating-point numbers. When it reaches double precision, its operation rate and resource consumption will increase significantly

However, the document "Study on Solving Square Root Based on CORDIC Algorithm and FPGA Implementation" only describes a method for realizing the square root of a fixed-point number, and the definition domain of the number to be rooted cannot be applied to double-precision floating-point numbers.

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