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Processor execution state model building method and system based on ftrace

An execution state, processor technology, applied in the direction of electrical digital data processing, instruments, climate sustainability, etc., can solve the problems of inability to fully obtain processor power consumption hotspots, performance consumption hotspots, low power consumption, etc.

Active Publication Date: 2021-01-26
MEIZU TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] From the perspective of the processor itself, when the processor is in the plug-in state and does not enter the idle power-saving state, the processor will generate power consumption or consume performance (when the processor is in the unplugged state or in the idle power-saving state, The power consumption is very low, compared to negligible), this state is called "execution state", grasping the time of the processor in the "execution state" under various operating frequencies has become a hot spot for analyzing processor power consumption and performance consumption However, since the freq_stats, idle_stats, and hotplug_profiler modules are independent of each other, the analysis results of the three cannot fully obtain the processor power consumption hotspots and performance consumption hotspots

Method used

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  • Processor execution state model building method and system based on ftrace
  • Processor execution state model building method and system based on ftrace
  • Processor execution state model building method and system based on ftrace

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0084] Figure 4 A schematic diagram showing a processor execution state model when a desktop idle scene is applied according to an embodiment of the present invention.

[0085] Figure 5 A schematic diagram showing a processor execution state model when a desktop idle scene is applied according to an embodiment of the present invention.

[0086] Such as Figure 4 and Figure 5 As shown, by analyzing the first state type and the second state type of the processor's work and the execution time of each frequency when the processor is in the execution state, the processor execution state model can be established.

[0087] The data arrangement is shown in Table 3 and Table 4:

[0088]

[0089] table 3

[0090]

[0091] Table 4

[0092] From the calculated processor state results, it can be seen that for cluster0, CPU0 to CPU3 are always in the plug-in state, and the power consumption hotspots are mainly distributed at the frequency points of 442000KHz, 754000KHz, 858000K...

Embodiment 2

[0095] Figure 6 A schematic diagram showing a processor execution state model when a temple run scene is applied according to an embodiment of the present invention.

[0096] Figure 7 A schematic diagram showing a processor execution state model when a temple run scene is applied according to an embodiment of the present invention.

[0097] Such as Figure 6 and Figure 7 As shown, by analyzing the first state type and the second state type of the processor's work and the execution time of each frequency when the processor is in the execution state, the processor execution state model can be established.

[0098] The data arrangement is shown in Table 5 and Table 6:

[0099]

[0100] table 5

[0101]

[0102] Table 6

[0103] From the calculated processor state results, it can be seen that for cluster0, CPU0 to CPU3 are always in the plug-in state; for cluster1, CPU4, CPU5, CPU6, and CPU7 are always in the plug-out state.

[0104] According to the above processo...

Embodiment 3

[0106] Figure 8 A schematic diagram of a processor execution state model when applying an NBA2K16 game scene according to an embodiment of the present invention is shown.

[0107] Figure 9 A schematic diagram of a processor execution state model when applying an NBA2K16 game scene according to an embodiment of the present invention is shown.

[0108] Such as Figure 8 and Figure 9 As shown, by analyzing the first state type and the second state type of the processor's work and the execution time of each frequency when the processor is in the execution state, the processor execution state model can be established.

[0109] The data arrangement is shown in Table 7 and Table 8:

[0110]

[0111] Table 7

[0112]

[0113] Table 8

[0114] From the calculated processor status results, it can be seen that for cluster0, the power consumption hotspots of CPU0 to CPU3 are mainly distributed at the 1482000KHz frequency point; for cluster1, the CPU4 and CPU5 power consumpt...

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Abstract

The invention provides an Ftrace-based processor executing status model building method and system. The Ftrace-based processor executing status model building method comprises the steps of turning onan Ftrace switch, and receiving processor status information sent by at least one core; building an information file, reading each piece of status information, and saving the status information into the information file; calling the status information in the information file; analyzing and calculating the executing time of the processor under each frequency; according to the status information andthe executing time, constructing an executing status model of the processor. According to the technical scheme, the processor executing status model built on the basis of Ftrace can analyze the processor status information such as frequency switching information, work switching information and plug-pull switching information, power consumption hotspots and performance consumption hotspots of theprocessor core can be sufficiently obtained, and a foundation is laid for processor power consumption optimization and performance optimization.

Description

technical field [0001] The invention relates to the field of embedded software development, in particular to a Ftrace-based processor execution state model building method and an Ftrace-based processor execution state model building system. Background technique [0002] In related technologies, in the field of embedded software development, in order to optimize system power consumption and performance, developers need to obtain the working status of the processor. In a complete embedded system, the state of the processor is affected by many strategies, among which the typical ones are processor dynamic voltage frequency adjustment (cpu dvfs), processor hot plug (cpu hotplug), processor status information (cpu idle), in order to grasp these working states of the processor, various technical solutions have been proposed in the industry: the freq_stats module can analyze the retention time of the processor at each frequency, the idle_stats module can analyze the retention time ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/34
CPCG06F11/3409G06F11/3423G06F11/3495Y02D10/00
Inventor 曾云清
Owner MEIZU TECH CO LTD