Anti-falling layer grinding method applied to low dielectric material flip chip

Abstract

The invention provides an anti-falling layer grinding method applied to a low dielectric material flip chip. The anti-falling layer grinding method comprises the following steps that 1, the flip chipis provided; 2, a substrate is thinned; and 3, the side surface of the chip is ground. In the step 1, the flip chip comprises a chip, a base plate and convex blocks, the base plate comprises a plurality of layers of sub-plates, the chip is connected to the sub-plates of the top layer of the substrate through the convex blocks, filling primers fill a gap between the chip and the substrate; and in the step 2, the side surface of the chip, the side surface of the thinned substrate, and the filling primers are ground until the convex blocks located on the periphery of the first circle are exposed.According to the anti-falling layer grinding method applied to the low dielectric material flip chip, a novel method for preventing delamination or burst is provided, the substrate is thinned, and the substrate and the chip are ground, so that delamination or burst of the flip-chip caused by grinding is prevented, and judgment of an operator on an experimental result is avoided when a cross section is observed, and the accuracy of the experiment result can be improved; and whether a structure body is damaged caused by reliability experiment or the deformation of a product can be accurately judged.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an anti-delamination grinding method applied to flip-chip chips made of low-dielectric materials. Background technique [0002] Flip-chip technology combined with a square ball grid array (BGA) packaging process can provide better electrical characteristics, and greatly increase the pin density, reduce noise interference, better heat dissipation, and can shrink The package size meets the needs of high-end products and high performance, so it has become the mainstream package type. [0003] In recent years, this flip-chip sectional packaging technology has been widely used in computer technology and 3C products, such as: CPU packaging ATI graphics chips, etc., as well as some high-end ASIC component products, can be seen in large quantities. Such as figure 1 and figure 2 As shown, the flip chip mainly includes a chip 10 , a substrate 20 , and bumps 11 . Wherein, the su...

AI Technical Summary

Problems solved by technology

[0006] In order to solve the technical problem of delamination or bursting caused by artificial stress when grinding chips in the prior art, the present invention provides a delamination-preventing grinding method applied to low-dielectric material flip-chip chips

Images