Integrated gate drive circuit and display equipment

Abstract

The invention relates to a drive unit and a drive device. The drive unit includes a register module, a plurality of output modules, and a plurality of pull-down branches, wherein the register module is configured to generate mutually opposite first control signal and second control signal under the influence of a first low frequency clock signal; each output module includes an output branch, and is configured to generate an output signal related with a high frequency clock signal received by a driving transistor under the influence of the first control signal; and the plurality of pull-down branches are coupled to the output branches, and are configured to maintain a plurality of nodes corresponding to the output branches at the corresponding low potential.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to an integrated gate drive circuit and a display device. Background technique [0002] In recent years, active matrix organic light emitting diode (AMOLED) technology has developed extremely rapidly. Compared with the traditional thin film transistor liquid crystal display (Thin film transistor liquid crystal display, TFT-LCD), AMOLED display has higher contrast, higher color saturation and thinner display module. AMOLED display is generally considered to be the mainstream of next-generation flat panel display technology. [0003] Integrated gate driver on array (Gate driver on array, GOA) technology is widely used in TFT-LCD. This is because the GOA technology omits the bonding process of the gate circuit and can form a display panel with a narrow border. This reduces the production process, reduces product costs, improves integration, narrows the frame, and has significant a...

AI Technical Summary

Problems solved by technology

therefore, figure 1 Although the circuit shown can obtain the required output signal by changing the clock, as the clock signals clkx and clkx-1 become complex signals, the cascaded signals of the circuit vcn-2, vgn-2, vcn+1 and vcn+ 2 and the output signals vcn and vgn of the current stage also change accordingly, which increases the number of signal jump edges and increases the power consumption; secondly, in the low potential maintenance stage after the signal output of the current stage, the internal node Q is in a suspended state when the clkx potential jumps , it may accumulate charge when it is coupled by the clock for many times, so that the output will be unstable, and even wrong output may occur; in addition, while generating complex output signals, we do not want the cascaded signal to become more complex. Complex, otherwise, the transistors it controls will not be in good working condition, and will increase the dynamic power consumption of the circuit

[0006] It can be seen that the integrated gate drive circuit in the prior art is designed for TFT-LCD and is used to generate a single pulse signal with the same pulse width as the clock. Changes, while performance and even functions will be adversely affected, so it is not suitable for AMOLED use

In addition, traditional GOA circuits often require special design when generating ultra-wide pulses, otherwise the output will be seriously distorted due to the leakage of internal nodes

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