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Dual-computer memory data sharing system based on Aurora bus

A memory data and bus technology, which is applied in the field of dual-computer memory data sharing systems, can solve problems such as memory data sharing that is not suitable for point-to-point peer-to-peer communication in dual-computer systems

Active Publication Date: 2018-12-18
BEIJING INST OF COMP TECH & APPL
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  • Abstract
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Problems solved by technology

[0003] However, the PCIe bus is based on a tree topological structure, which is not suitable for applications such as point-to-point communication and memory data sharing in a dual-computer system.

Method used

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  • Dual-computer memory data sharing system based on Aurora bus
  • Dual-computer memory data sharing system based on Aurora bus
  • Dual-computer memory data sharing system based on Aurora bus

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Embodiment Construction

[0032] In order to make the purpose, content, and advantages of the present invention clearer, the specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0033] FPGA is a programmable device with extremely flexible interface. Through programming, the PCIe bus interface and Aurora bus interface can be implemented on the chip to communicate with the outside world. Compared with dedicated protocol chips, its functions can be tailored or expanded as required. It can be used to realize the connection function between the two buses, and realize data sharing between dual-machine systems based on this architecture. Under the premise of meeting the performance requirements, the system functions can be flexibly tailored, the system integration can be improved, and the cost can be controlled. The present invention provides a data sharing system in a dual-machine system based on P...

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Abstract

The invention relates to a dual-computer memory data sharing system based on Aurora bus, which relates to the technical field of data sharing. The scheme of the invention adopts the PCIe bus IP core provided by Xilinx and the Aurora bus IP core to cooperate with the Aurora transport layer protocol mapping module and the Aurora link management module which are emphatically designed in the scheme torealize the memory data sharing of the dual-computer system. In the scheme of the invention, the Aurora bus of the data link layer is packaged in the transmission layer, the mapping of the CPU address domain sharing the virtual address domain is realized, the Aurora data packet format and the parsing rule are designed, and the transparent mapping of the memory address space between the two computers is completed.

Description

technical field [0001] The invention relates to the technical field of data sharing, in particular to a dual-computer memory data sharing system based on the Aurora bus. Background technique [0002] The PCIe bus is a high-speed serial local bus widely used in various computers. As an extension of the system bus connecting Cache and main memory, its main function is to connect external devices. As an upgrade of the traditional PCI bus, PCIe is compatible with the PCI bus, while greatly improving the data transmission rate and efficiency, and can more effectively ensure the reliability of transmission. [0003] However, the PCIe bus is based on a tree topological structure, which is not suitable for applications such as peer-to-peer communication and memory data sharing in a dual-computer system. Aurora is a tailorable, lightweight, data link layer point-to-point high-speed serial bus protocol first proposed by Xilinx in 2002, specifically for high-speed data communication ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/17
CPCG06F15/17
Inventor 王啸林卢秋实张小佩阎哲
Owner BEIJING INST OF COMP TECH & APPL
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