Integrated circuit testing excitation generation method based on modular excitation model

Abstract

The invention belongs to the technical field of integrated circuit testing, and particularly relates to an integrated circuit testing excitation generation method based on a modular excitation model.According to the integrated circuit testing excitation generation method based on the modular excitation model, a time axis configuration method is applied to generate task points corresponding to testing cases, and an excitation file containing the excitation model is formed by configuring the task points, the generation of an excitation signal is realized. The task points are enabled to correspond to the testing cases, and visual management and batch execution of the test cases are realized. The integrated circuit testing excitation generation method based on the modular excitation model notonly solves the contradictions of high labor cost and complicated debugging in an existing scheme, but also has a simple configuration method, and is suitable for simulation testing of integrated circuits such as ASIC, SOC and FPGA.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit testing, and in particular relates to a method for generating integrated circuit test excitation based on a modular excitation model. Background technique [0002] At present, when conducting integrated circuit testing, testers first write a test description document, which includes all test cases of the integrated circuit to be tested. Each test case describes the test purpose, test input data, test steps and expected test results. Take the test case of an FPGA software as an example, such as figure 1 shown. [0003] For FPGA software simulation testing, it is necessary to convert the above test cases into a language that can be recognized by the FPGA simulation execution tool so that it can be loaded into the simulation execution tool to perform simulation. At present, the implementation of test cases is in the code editing environment, and it takes a lot of manpower and time to re...

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is: how to solve the contradictions of the current integrated circuit testing technology, high labor cost, and complicated debugging, and improve the system, timing, visualization, and test case batch processing functions of the integrated circuit simulation test environment

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