FPGA acceleration card based on Xilinx XCVU37P chip

Abstract

The invention provides an FPGA acceleration card, comprising: a Xilinx XCVU37P chip, wherein the chip comprises a HBM; the Xilinx XCVU37P chip comprises an Xilinx XCVU37P chip. And an external high-speed memory externally connected to the Xilinx XCVU37P chip; the data from CPU is transferred to Xilinx XCVU37P chip through PCIE for synchronous buffering and format conversion, and the data is storedin HBM and external high-speed memory. The data is then transferred back to the CPU via PCIE for subsequent processing. The memory access bandwidth of the FPGA acceleration card of the invention is not limited by the number of I / O pins of the device, and the buffer access and the consistency problem of large power consumption are avoided, the delay of reading and writing is reduced, and the datareading and writing speed is faster.

Description

technical field [0001] The present invention generally relates to the field of computer technology, and more specifically, relates to an FPGA accelerator card based on a XilinxXCVU37P chip. Background technique [0002] Nowadays, operations such as encoding and decoding, data compression and storage, and encryption are becoming more and more complex, requiring higher and higher processing capabilities of processors. Traditional processors can no longer meet the performance requirements of high-performance computing (HPC) application software, resulting in a gap between requirements and performance. Improving processor performance is not the only way to solve application requirements. Using dedicated processors to expand processors has always been It is a reliable way to solve performance bottlenecks. As the basis of coprocessor design, FPGA (Field Programmable Gate Array) has obvious advantages in terms of price, performance, ease of use and power consumption. [0003] The...

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Problems solved by technology

[0004] However, the limitations of the above methods are that compared to DDR4 storage devices, DDR3 storage devices consume more power, operate at a lower frequency, and have limited capacity.

In addition, the storage device of the FPGA relies entirely on the external memory, and the access bandwidth of the memory will be limited by the number of I / Os of the device, and it will also consume part of the power consumption to solve buffer access and consistency

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