A method for manufacturing a three-dimensional stereoscopic chip and a wire tracing structure thereof
A three-dimensional, production process technology, applied in the manufacture of electric solid-state devices, semiconductor devices, semiconductor/solid-state devices, etc. small area effect
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[0013] The structure of the present invention will be further described below with reference to the drawings and preferred specific embodiments of the present invention.
[0014] Reference figure 1 with figure 2 As shown in the production process method of the three-dimensional chip of the present invention, the first metal layer 2 is first made on the substrate 1; 4. Perform a gradient treatment on the edge of the isolation adhesive layer 4; then, a second metal layer 3 that straddles the first metal layer 2 on the isolation adhesive layer 4 is fabricated on the substrate 1. The function of the isolation adhesive layer 4 is to realize the intersection of the first metal layer 2 in the horizontal direction and the second metal layer 3 in the vertical direction without short circuit. Compared with the traditional production of the substrate and then the second metal layer 3, the present invention greatly reduces The volume of the chip.
[0015] Since the isolation adhesive layer ...
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