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Pulse driven power fet

A pulse and driver technology, applied in the field of gallium nitride semiconductors, which can solve the problems of frequency limitation, high current consumption, and high cost

Active Publication Date: 2019-02-01
NAVITAS SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, such solutions are frequency limited, have propagation delay limitations, consume high current, require additional PCB footprint, and are expensive

Method used

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Embodiment Construction

[0019] Specific embodiments of the present invention are described herein with reference to the accompanying drawings.

[0020] Various details are set forth herein as they relate to certain embodiments. However, the invention can also be practiced otherwise than as described herein. Modifications to the discussed embodiments may be made by those skilled in the art without departing from the invention. Accordingly, the invention is not intended to be limited to the particular embodiments disclosed herein.

[0021] image 3 is a schematic diagram of a power circuit 300 with integrated gate drive circuitry and power switches such as GaN power FETs, according to an embodiment. Power circuit 300 receives a pulse signal from pulse generator 320 configured to generate pulses in response to a signal from signal source 305 . For example, the signal source 305 may be a PWM signal source. The power circuit 300 includes a pulse detector 330 , a state storage device 340 , a driver 350...

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Abstract

A power drive circuit is disclosed. The power circuit includes: a pulse detector, configured to generate first and second control signals in response to first and second pulse signals, respectively. The power drive circuit also includes a state storage device, configured to generate first and second driver input signals in response to the first and second control signals, respectively. The power drive circuit also includes a driver configured to generate first and second gate drive signals in response to the first and second driver input signals, respectively. The power drive circuit also includes a power switch, configured to receive the first and second gate drive signals, where the first and second gate drive signals control the power switch to selectively conduct or not conduct currentbetween first and second terminals.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of U.S. Provisional Patent Application No. 62 / 511,039, filed May 25, 2017, entitled "GAN FET WITH INTEGRATED PULSEDETECTION CIRCUIT," the contents of which are incorporated herein by reference in their entirety for all Purpose. technical field [0003] The described embodiments relate generally to gallium nitride semiconductors, and more specifically, to power switches controlled by pulse detection circuits. Background technique [0004] Existing integrated circuits include GaN power FETs together with gate drivers and are available in a single monolithic package. This allows a standard PWM signal (from a microcontroller or PWM controller IC) to be used as a simple input for switching the power FETs on and off. Products such as those illustrated in Figure 1 include a VCC supply pin, a PWM gate drive input, a VDD supply pin, a DZ Zener reference pin, a power FET drain connection, an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/687H03K7/08H02M3/07
CPCH03K2217/0027H03K17/0822H03K17/691H03K9/08H02M7/217H03K17/063H03K17/6235
Inventor T·里巴里什张炬
Owner NAVITAS SEMICON
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