Unlock instant, AI-driven research and patent intelligence for your innovation.

Multiplication hardware circuit, system on chip and electronic equipment

A hardware circuit and multiplication technology, applied in the field of data processing, can solve problems such as high cost, affecting equipment power consumption, and restricting matrix operation speed.

Active Publication Date: 2020-11-10
HUAWEI TECH CO LTD
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the multiplication and accumulation operation, the cost of multiplication is the largest, which restricts the speed of matrix operations and also affects the power consumption of the device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Multiplication hardware circuit, system on chip and electronic equipment
  • Multiplication hardware circuit, system on chip and electronic equipment
  • Multiplication hardware circuit, system on chip and electronic equipment

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0070] The matrix operation is abstracted into a mathematical model, which can be a multiply-accumulate operation, or called a multiply-accumulate operation. Wherein, both P and Q can represent a matrix or a vector. P·Q may represent matrix operations in a broad sense, including at least one of convolution operations of matrix*vector, matrix*matrix, and vector*vector. The value of P·Q can be the element p in P i with the corresponding element q in Q i Perform multiplication to get the product p i q i , and then accumulate these products, this process is the multiply-accumulate operation. The result of a multiply-accumulate operation is an element of the result matrix.

[0071] Due to the large amount of multiplication in the multiply-accumulate operation, an existing solution is to use the logarithmic operation system, that is, to convert the data from the linear field to the log field for representation and operation. Among them, in this application, the logarithmic dom...

Embodiment 3

[0192] Based on the above embodiments, this embodiment describes the steps in S930 in Embodiment 2 in detail.

[0193] 8.1 Method 1

[0194] Optionally, as an embodiment, the absolute value of the data in the logarithmic domain representation format corresponding to the s bits obtained in the above step S930 is the value N of the fractional part of the logarithmic value with base 2, which may include: table lookup Obtaining the absolute value of the data in the logarithmic domain representation format corresponding to s bits takes the value N of the fractional part of the logarithmic value with base 2, where N corresponding to all possible values ​​of s bits is stored in the table. The method of determining that the absolute value of the data takes the value N of the fractional part of the logarithmic value with the base 2 is called a look-up table method.

[0195] Specifically, still with Figure 10 For illustration, the decimal calculation subcircuit 1030 intercepts the 8 ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The application provides a multiplication hardware circuit, a system on chip and electronic equipment, the hardware circuit includes a logarithmic domain adder and a linear domain conversion circuit, and its acquisition sub-circuit acquires data represented in the logarithmic domain, and the logarithmic domain representation is based on data The absolute value of the absolute value takes the format of the logarithmic value representing the value of the data with the base 2, and the data is a binary number of 1+m+n bits in the logarithmic domain representation format; the decoding sub-circuit decodes to obtain the corresponding value of the first decimal place Linear representation format, the linear representation format is a format that expresses the value of the data itself; the shift sub-circuit shifts the linear representation format corresponding to the first decimal place according to the value M of the integer part of the logarithmic value, and obtains the absolute value of the data The value of the value in the linear representation format; the output subcircuit represents the data as a binary number of 1+j+k bits in the linear representation format. The hardware circuit of the present application can reduce the overhead when converting data between the linear domain and the logarithmic domain, and improve the speed of multiplying and accumulating calculations.

Description

technical field [0001] The present application relates to the field of data processing, and more particularly, to multiplication hardware circuits, systems-on-chip, and electronic devices. Background technique [0002] In today's information age, the Internet and Internet of Things applications generate a large amount of data every day, and mining and processing these data can often obtain valuable information. With the popularity of unmanned vehicles, drones, and smart terminals, artificial intelligence has been widely valued. It uses neural network technology to process the data input by various sensors in real time to realize the perception of the external environment. In these data processing algorithms, matrix operation is a core calculation mode, such as matrix multiplication, and the basis of matrix multiplication is multiply-accumulate operation. Using a typical VGG16 neural network to process a picture with a scale of 224*224 requires 29 billion multiplication and ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/523
CPCG06F7/523G06F7/5235G06F7/4812G06F7/487
Inventor 徐斌王开兴田清霖
Owner HUAWEI TECH CO LTD