A verification method and verification device
A verification method and verification device technology, applied in the field of verification methods and verification devices, can solve the problems affecting the efficiency of CNN design, low comparison efficiency, and long time spent, so as to avoid layer-by-layer comparison and improve verification efficiency Effect
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[0034] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.
[0035] At present, the comparison between the running results of the FPGA design and the simulation results is done manually, which takes a long time and the comparison efficiency is low, especially when the neural network has many layers, and each layer of the neural network has calculated data. In this case, it will affect the efficiency of FPGA-based CNN design.
[0036] In view of this, the embodiment of the present application provides a verification method. The host side obtains the running result of the currently running neural network layer from the FPGA board, and performs the running result according to the simulation result of the computer software s...
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