An upper triangular part storage device of a self-conjugate matrix and a parallel reading method
A self-conjugate matrix and storage device technology, applied in the field of matrix operations, can solve the problems of low parallelism of row-column vector data access and low efficiency of hardware utilization matrix operation algorithms, and achieve the effect of improving algorithm efficiency
Active Publication Date: 2019-04-02
极芯通讯技术(安吉)有限公司
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[0005] In order to solve the problem in the prior art that the parallelism of the row and column vector data access of the triangular matrix is not high, resulting in low hardware utilization and matrix operation algorithm efficiency, the embodiment of the present invention provides an upper self-conjugate matrix Triangular Partial Storage Device and Parallel Read Method
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[0027] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
[0028] In order to be able to read all the elements of the row and column vectors of the self-conjugate matrix in parallel and improve the utilization efficiency of the parallel processing unit, it is necessary to develop a parallel conflict-free access mechanism so that the parallelism of data access can reach the hardware parallelism of the compu...
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The embodiment of the invention provides an upper triangular part storage device of a self-conjugate matrix and a parallel reading method, and the device comprises a storage module selection circuit which is used for selecting a storage module corresponding to each element of the upper triangular part of the self-conjugate matrix to be accessed; an address generation circuit which is used for calculating the logic address of each element of the triangular part on the self-conjugate matrix to be accessed in the corresponding storage module; m parallel storage modules which are used for storingdata corresponding to each element of the triangular part on the self-conjugate matrix to be accessed; a data shuffling module which is used for performing shuffling operation on the data read from the storage module; and a conjugate taking module which is used for carrying out bypass operation and conjugate taking operation on the shuffled data. According to the embodiment of the invention, onlythe upper triangular part of the self-conjugate matrix needs to be stored, any row vector and any column vector of the self-conjugate matrix are supported to be read and recovered in parallel, a parallel computing unit of hardware can be fully utilized, and the matrix computing efficiency is improved.
Description
technical field [0001] The embodiments of the present invention relate to the technical field of matrix operations, and more specifically, to an upper triangular part storage device and a parallel reading method of a self-conjugate matrix. Background technique [0002] Self-conjugate matrix (Hermitian Matrix) is a conjugate symmetrical square matrix, which is widely used in the field of digital signal processing. For example, many signal detection algorithms need to use the real autocorrelation matrix to obtain the second-order statistical characteristics of the signal. The complexity of solving a self-conjugate matrix increases quadratically with the increase of the matrix order. In order to reduce the computational complexity, according to the complex conjugate symmetry property of the self-conjugate matrix, only the upper triangular part of the self-conjugate matrix is calculated. The lower triangular part of the conjugate matrix can be obtained from the upper triangul...
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IPC IPC(8): G06F17/16
CPCG06F17/16
Inventor 刘大可刘劭晗
Owner 极芯通讯技术(安吉)有限公司