Semiconductor structure
A technology for semiconductors and semiconductor tubes, applied in the field of semiconductor structures, can solve problems such as fracture, cracking of circuit wiring layers, damage to circuit wiring layers, etc.
Active Publication Date: 2019-04-05
TAIWAN SEMICON MFG CO LTD
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- Description
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Problems solved by technology
However, such stress can potentially damage the circuit routing layer
For example, under thermal stress, cracks or breaks may occur in the circuit wiring layer, resulting in circuit failure
Method used
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Embodiment Construction
[0052] The following disclosure provides many different embodiments, or examples, for implementing different features of the presented subject matter. Specific examples of components and arrangements are set forth below to simplify the present disclosure. Of course, these are examples only and are not intended to be limiting. For example, the following description of forming a first feature on or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which the first feature Embodiments in which additional features may be formed with a second feature such that the first feature may not be in direct contact with the second feature. Additionally, this disclosure may reuse reference numbers and / or letters in various instances. Such re-use is for brevity and clarity and does not itself indicate a relationship between the various embodiments and / or configurations discussed.
[0053] Also...
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Abstract
A semiconductor structure including an insulating encapsulant, a first semiconductor die, a second semiconductor die and a redistribution circuit layer is provided. The first and the second semiconductor dies embedded in the insulating encapsulant and separated from one another. The first semiconductor die includes a first active surface accessibly exposed and a first conductive terminal distributed at the first active surface. The second semiconductor die includes a second active surface accessibly exposed and a second conductive terminal distributed at the second active surface. The redistribution circuit layer including a conductive trace is disposed on the first and the second active surfaces and the insulating encapsulant. The conductive trace is electrically connected from the firstsemiconductor die and meanderingly extends to the second semiconductor die, and a ratio of a total length of the conductive trace to the top width of the insulating encapsulant ranges from about 3 toabout 10.
Description
technical field [0001] Embodiments of the present invention relate to a semiconductor structure. Background technique [0002] In one aspect of conventional semiconductor packaging techniques, such as integrated fan-out wafer level packaging (InFO-WLP), a circuit board may be formed over the die to electrically connect active devices in the die. redistribution layer (redistribution layer, RDL). Additionally, a molding compound may be formed around the die to provide surface area to support the fan-out interconnect structure. For example, redistribution layers, including circuit routing layers, are typically formed over both the die and the molding compound. [0003] In such a semiconductor package structure, heat causes both the die and the molding compound to expand with their respective coefficients of thermal expansion (CTE) during operation. The CTE mismatch between the die and the molding compound will gradually increase the tensile stress concentration. However, su...
Claims
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IPC IPC(8): H01L23/24H01L25/065H01L23/485
CPCH01L23/24H01L25/0655H01L2224/02381H01L2224/02379H01L2224/02331H01L2224/16225H01L2224/32225H01L2224/73204H01L2924/15311H01L2924/18161H01L2224/244H01L2224/18H01L2224/821H01L24/20H01L24/82H01L2224/245H01L2224/82031H01L24/24H01L2224/2405H01L2224/24137H01L2224/24101H01L2924/351H01L2924/00H01L2924/01029H01L2924/01013H01L2924/01047H01L2924/01079H01L2924/0001H01L23/31H01L21/78H01L24/06H01L23/485H01L2224/24011
Inventor 陈洁陈宪伟陈英儒
Owner TAIWAN SEMICON MFG CO LTD