LDPC-BCH decoding method based on graphics processor

Abstract

The invention relates to an LDPC-BCH decoding method based on a graphics processor and belongs to the communication technology field. The method is characterized by converting check matrixes with different code lengths and code rates into a quasi-cyclic structure; carrying out compression, inter-row interweaving, and inline interweaving on the check matrix of the quasi-cyclic structure; and in iterative decoding, using whether BCH code decoding is correct as an iterative termination condition to eliminate an error code platform and improve the error correction performance of a decoder, whereinthe above step especially includes: carrying out matrix interweaving on the check portion of the outside information of an input codeword variable node; operating resource distribution; updating theposterior logarithmic likelihood value of a variable node and a logarithmic likelihood values transmitted by the check node to the variable node; carrying out hard decision; and when the BCH code decoding is correct or reaches the maximum number of iterations, terminating the iterative decoding, and outputting an information bit and a decoding success identifier. Decoder delay is in the order of milliseconds, and a decoding throughput is in the order of hundreds of megabytes. Error correction performance is comparable to the error correction performance recommended by a second generation digital satellite broadcasting standard.

Description

technical field [0001] The invention relates to an LDPC-BCH decoding method based on a graphic processor, in particular to an LDPC-BCH decoding method based on a graphic processor used in the second-generation digital satellite broadcasting standard, and belongs to the technical field of communication. Background technique [0002] DVB-S2 is a new generation DVB system serving broadband satellite applications. Compared with DVB-S, DVB-S2 uses LDPC+BCH code as channel coding method to support 1 / 4, 1 / 3, 2 / 5, 1 / 2 ,3 / 5,2 / 3,3 / 4,4 / 5,5 / 6,8 / 9,9 / 10 and other code patterns. The LDPC code makes the decoding performance close to the Shannon limit, and the BCH code can eliminate the bit error platform. Under the same transmission conditions, DVB-S2 increases the transmission capacity by more than 30%, and a stronger reception effect can be obtained under the same spectral efficiency. In interactive point-to-point applications, DVB-S2 uses VCM and ACM technologies. Different service typ...

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Problems solved by technology

Literature (D.Kun, "High throughput GPU LDPC encoder and decoder for DVB-S2," in2018 IEEE Aerospace Conference, 2018, pp.1-9.) improved GPU utilization by decoding 8000 frames at the same time, reaching 500-1000Mbps Throughput rate, but greatly increases the decoding delay and memory consumption, not suitable for actual communication systems

At the same time, this document also uses the minimum sum decoding algorithm, and the BCH code is not considered as the termination condition in the iteration, and the error correction performance is also lost.

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