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multi-core parallel signal processing system and method based on an SRIO bus

A signal processing, multi-core technology, applied in electrical digital data processing, instruments, etc., to achieve the effect of improving the real-time performance of the system and optimizing the operating efficiency

Inactive Publication Date: 2019-04-19
SHANGHAI RADIO EQUIP RES INST
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  • multi-core parallel signal processing system and method based on an SRIO bus
  • multi-core parallel signal processing system and method based on an SRIO bus

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[0039] The present invention discloses a multi-core parallel signal processing system and method based on the SRIO bus. In order to make the present invention more obvious and understandable, the present invention will be further described below in conjunction with the accompanying drawings and specific implementation methods.

[0040] like figure 1 Shown, the multi-core parallel signal processing system based on SRIO bus of the present invention is provided with the plate card that comprises multi-chip multi-core DSP, and this plate card comprises 4 slices of DSP, a slice of CPS1848 high-speed interconnect exchange chip, a VPX interface, a slice of CPLD, a slice of FPGA chip.

[0041] Each DSP contains 8 processor cores inside, and the processor core adopts VLIW (very long instruction word) architecture, which can theoretically execute up to 8 instructions in parallel.

[0042] The role of the CPS1848 high-speed interconnection switch chip is: the DSPs with built-in SRIO com...

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Abstract

The invention discloses a multi-core parallel signal processing system and method based on an SRIO bus, relates to a hardware architecture and a software architecture, and realizes high-speed interconnection based on an SRIO high-speed exchange chip and a DSP. An asynchronous message mechanism is adopted, so that the maximization of the core operation throughput of each DSP is realized, and the overall efficiency of the system and the parallelism of calculation can be effectively improved; The method is based on a programming model of asynchronous messages, developers can efficiently and rapidly achieve mapping from the parallel signal processing algorithm to the DSP processing unit, and the method can be applied to the fields of radar, digital image processing and the like.

Description

technical field [0001] The invention belongs to the technical field of digital signal processing and parallel computing, and in particular relates to a multi-core parallel signal processing system and method based on SRIO bus. Background technique [0002] With the increase of signal processing precision and complexity, multi-core and many-core signal processing systems are widely used. Through the parallel development of established signal processing algorithms, it can run in parallel on multiple DSP (digital signal processor) cores. program, so as to achieve the acceleration of existing signal processing algorithms and improve the real-time performance of related applications. The distribution and collection of data between cores is based on shared storage or high-speed buses (located between cores of different processors). Therefore, the acceleration capability of a multi-core system depends not only on the operating speed of the processor cores, but also on the communica...

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Application Information

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IPC IPC(8): G06F13/42
CPCG06F13/4213
Inventor 杨经纬黄勇唐琳陈曦李爽爽李灿乐
Owner SHANGHAI RADIO EQUIP RES INST
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