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A digital-to-analog converter DAC based on a parallel structure

A digital-to-analog converter and parallel technology, which is applied in the direction of digital-to-analog converters, etc., can solve the problems of large area and slightly poor stability of DA conversion circuits, etc.

Active Publication Date: 2019-05-03
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Compared with the DAC chip, the DA conversion circuit may have the following disadvantages: 1. The area of ​​the DA conversion circuit will be larger than the area occupied by the DAC chip; 2. Due to the batch of device specifications, the stability of the DA conversion circuit will be lower. Slightly worse than the DAC chip; 3. Due to the layout and wiring, the noise of the DA conversion circuit may be greater than the noise of the DAC chip

Method used

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  • A digital-to-analog converter DAC based on a parallel structure
  • A digital-to-analog converter DAC based on a parallel structure
  • A digital-to-analog converter DAC based on a parallel structure

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Embodiment

[0032] Figure 4 It is a structural diagram of a specific implementation of the digital-to-analog converter DAC based on the parallel structure of the present invention. Such as Figure 4 As shown, the digital-to-analog converter DAC based on the parallel structure of the present invention includes FPGA1, reference power supply 2, N-1 reference power supply DAC3, N-1 driving operational amplifiers 4, N sub-DAC5, N operational amplifiers 6 and adders Module 7, the number of resolution digits of the digital-to-analog converter DAC is K, and the resolution digits of the nth sub-DAC is k n , n=1,2,…,N, then Each module is described in detail below.

[0033] FPGA1 generates K-bit digital signal Data, which is continuously divided into N sub-digital signal Data n , the number of digits of the nth sub-digital signal is k n , the nth sub-digital signal Data n Send to the nth sub-DAC. In addition, FPGA1 also needs to generate voltage control signals C of N-1 reference power sup...

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Abstract

The invention discloses a digital-to-analog converter DAC based on a parallel structure. The digital-to-analog converter DAC comprises an FPGA, a reference power supply, N-1 reference power supply DACs and N-1 driving operational amplifiers, N sub DACs, N operational amplifiers and an adder module. The FPGA generates a digital signal, divides the digital signal into N sub-digital-signals and sendsthe sub-digital-signals to the N sub-DACs respectively, and controls the output voltage amplitude of the reference power supply DACs, the reference power supply generates reference voltage and sendsthe reference voltage to the first sub-DAC and the reference power supply DACs, and the reference power supply DACs generate other N-DACs. Reference voltage of one sub DAC is sent to the driving operational amplifier, the driving operational amplifier is used for improving the driving capability of the reference voltage, and obtained signals serve as other N-signals. The reference voltage of one sub-DAC and the N sub-DACs carry out digital-to-analog conversion on the sub-digital signals respectively, and obtained analog current signals are converted into analog voltage signals through an operational amplifier and then added through an adder module to be output. According to the invention, the sub DACs are connected in parallel and are subjected to accumulative output, so that the high-resolution DAC is realized by using the low-resolution sub DACs.

Description

technical field [0001] The invention belongs to the technical field of digital-to-analog converter DAC, and more specifically relates to a digital-to-analog converter DAC based on a parallel structure. Background technique [0002] In the test of analog IC (Integrated Circuit, integrated circuit) or hybrid IC test, there are high requirements for the resolution and accuracy of the signal generated by the arbitrary waveform generator. With the improvement of the chip performance, the index of the arbitrary waveform generator The requirements are also getting higher and higher. The index of the arbitrary waveform generator is mainly limited by the index of the DAC (Digital to Analog Converter) chip or the DA (Digital to Analog) conversion circuit. Since the sampling rate of high-bit resolution DACs currently on the market is relatively low, it cannot meet the requirements of IC testing, so a new method is needed to improve the resolution and sampling rate of the signal genera...

Claims

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Application Information

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IPC IPC(8): H03M1/66
Inventor 王锂何海迅马敏戴志坚
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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