Array substrate and manufacturing method of the array substrate

Abstract

The embodiment of the invention discloses an array substrate and a manufacturing method of the array substrate. The array substrate comprises a substrate, a buffer layer, a semiconductor layer, an insulating layer and a grid layer. The buffer layer is arranged on the substrate; the semiconductor layer is arranged on the buffer layer; the insulating layer covers the buffer layer and the semiconductor layer; the grid electrode layer is arranged on the insulating layer; the semiconductor layer comprises a current carrier channel; the carrier channel is located on one side, facing the insulating layer, of the semiconductor layer; the insulating layer comprises a first thin film layer and a second thin film layer; the first thin film layer covers the semiconductor layer and the buffer layer; the second thin film layer covers the first thin film layer; the grid electrode layer is located on the second thin film layer; the density of the first thin film layer is larger than that of the secondthin film layer; and the carrier channel is connected with the first thin film layer. According to the scheme, the electrical stability of the array substrate can be improved.

Description

technical field [0001] The present application relates to the field of display technology, and in particular to an array substrate and a method for manufacturing the array substrate. Background technique [0002] In existing low temperature polysilicon technology (LTPS, Low Temperature Poly-silicon) products, the insulating layer between the semiconductor layer and the gate layer is often passed through TEOS / O 2 or SiH 4 / N 2 O is deposited in two ways. [0003] Among them, due to N 2 The N element in O will cause more defects at the interface between the semiconductor layer and the insulating layer, resulting in large flat-band voltage drift, resulting in electrical instability of the product. Therefore, the industry mostly adopts TEOS / O 2 The insulating layer is formed by a method, but the cost of this method is relatively high. Contents of the invention [0004] Embodiments of the present application provide an array substrate and a method for manufacturing the ar...

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Problems solved by technology

[0003] Among them, due to N 2 The N element in O will cause more defects at the interface between the semiconductor layer and the insulating layer, resulting in large flat-band voltage drift, resulting in electrical instability of the product

Therefore, the industry mostly adopts TEOS / O 2 The way to form the insulating layer, but the cost of this way is higher

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