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A kind of sample preparation method

A sample preparation and sample technology, applied in semiconductor/solid-state device components, semiconductor/solid-state device testing/measurement, semiconductor devices, etc., can solve problems that affect electrical stability and samples are difficult to meet electrical testing

Active Publication Date: 2022-01-25
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0003] However, because the internal structure of the 3D memory is too tightly distributed in space, the SSRM test results of the sample will be affected by the nearby conductive structures during the SSRM scanning process, which will affect its electrical stability, making it difficult for the sample to meet the requirements of the electrical test. Require

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  • A kind of sample preparation method
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Embodiment Construction

[0029] Exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided for a more thorough understanding of the present application and for fully conveying the scope disclosed in the present application to those skilled in the art.

[0030] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features kno...

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Abstract

The present application discloses a method for preparing a sample, the method comprising: providing a semiconductor structure, the semiconductor structure including a stack structure, a channel structure penetrating the stack structure, and a channel contact on the channel structure; The stacked structure includes alternately stacked gate layers and dielectric layers; a first sample preparation process is performed on the semiconductor structure to form a cross section that exposes the stacked structure and a part of the channel contact; removed by an etching solution the gate layer and the exposed part of the channel contacts in the semiconductor structure, leaving the unexposed channel contacts; and performing a second sample preparation process on the semiconductor structure, so that the processed A sample includes the channel structure and the channel contact on the channel structure.

Description

technical field [0001] The present application relates to the field of semiconductor technology, in particular to a sample preparation method. Background technique [0002] In 3D memory, the doping distribution at the channel plug and the common source of the array plays an important role in the electrical properties of 3D NAND products. Direct data cannot be obtained by conventional electrical testing. Generally, only scanning expansion resistors can be used. Microscopy (Scanning Spreading Resistance Microscopy, SSRM) physical characterization method is used to scan the surface of the sample with a conductive diamond probe to obtain a two-dimensional distribution map of the spreading resistance, which reflects the doping distribution of the carriers. [0003] However, because the internal structure of the 3D memory is too tightly distributed in space, the SSRM test results of the sample will be affected by the nearby conductive structures during the SSRM scanning process, w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/1157H01L27/11582H01L23/544
CPCH01L22/32H10B43/35H10B43/27
Inventor 陈茜卫晓阳锁志勇
Owner YANGTZE MEMORY TECH CO LTD
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