32results about How to "Improve the stability of electrical properties" patented technology

The invention belongs to the technical field of motor starting devices and provides a power-consumption-free starter for a commercial refrigeration compressor. The power-consumption-free starter comprises a current transformer L1, a bidirectional controllable silicon T, an inductor L2, a PTC element and a starting capacitor C1. One end of a primary coil and one end of a secondary coil of the current transformer L1 and the T1 pole of the bidirectional controllable silicon T are jointly connected with one end of an alternating current power source. The other end of the primary coil of the current transformer L1 is connected with the leading-out end M of a main winding of the motor, the other end of the secondary coil of the current transformer L1 is connected with the G pole of the bidirectional controllable silicon T, the inductor L2, the PTC element and the starting capacitor C1 are sequentially in series connection between the T2 pole of the bidirectional controllable silicon T and the leading-out end S of an auxiliary winding of the motor, and the combined leading-out end L of the main winding and the auxiliary winding of the motor is connected with the other end of the alternating current power source. The power-consumption-free starter can effectively reduce consumption of reactive power and meet the requirements for energy saving and environment friendliness; a coil of the auxiliary winding can bear large current, and the electrical property is stable; the power-consumption-free starter is good in generality and high in safety.

The invention provides a fabrication method of a low-temperature polycrystalline silicon thin-film transistor (TFT) substrate structure and the low-temperature polycrystalline silicon TFT substrate structure. According to the fabrication method of the low-temperature polycrystalline silicon TFT substrate structure provided by the invention, patterns, which are consistent in law and size, of heat-conducting insulating layers are arranged below a buffer layer of a drive TFT region; the heat-conducting insulating layers absorb heat in the subsequent excimer laser annealing treatment process, so that the cooling speed of amorphous silicon is quickened to form crystal nucleus; the crystal nucleus gradually grows in the annealing process; the heat-conducting insulating layers have the patterns which are consistent in law and size, so that polycrystalline silicon grains formed by the drive TFT region have relatively good consistency; the grains are relatively large; and the electrical consistency of a drive TFT is ensured. According to the low-temperature polycrystalline silicon TFT substrate structure provided by the invention, the patterns, which are consistent in law and size, of the heat-conducting insulating layers are arranged below the buffer layer of the drive TFT region; the polycrystalline silicon grains of the drive TFT region are relatively good in consistency and relatively large; and the electrical consistency of the drive TFT is relatively good.

The embodiment of the invention discloses a thin film transistor, a manufacturing method thereof and a display panel. The thin film transistor comprises a substrate, a gate, a gate insulation layer, asemiconductor layer, a doping layer and a source-drain, wherein the gate, the gate insulation layer, the semiconductor layer, the doping layer and the source-drain are sequentially formed on the substrate, and the semiconductor layer is used for absorbing a light ray with wavelength larger than 760 nanometers. In the thin film transistor disclosed by the embodiment of the invention, the light raycannot be absorbed by the semiconductor layer of the thin film transistor due to the characteristic that visible light is not absorbed by the semiconductor layer even the light ray radiates the semiconductor layer of the thin film transistor, the light ray cannot react with the visible light to generate a light leakage current, so that the leakage current of the thin film transistor cannot be increased. Compared with the prior art, the leakage current of the thin film transistor is reduced, the electrical performance stability of the thin film transistor is improved, and the power consumptionof the display panel also can be reduced when the thin film transistor is applied to the display panel.

The invention discloses a liquid crystal display panel and a preparation method thereof. A dummy pixel used for improving the uniformity of an active area is built on the liquid crystal panel, wherein data lines of the dummy pixel are connected with polycrystalline silicon layers; pixel electrodes of the dummy pixel are connected with a common electrode; the polycrystalline silicon layers of the dummy pixel are disconnected from the common electrode. According to the liquid crystal display panel and the preparation method thereof, the electrostatic influence, generated by the dummy pixel of the liquid crystal display panel, of the process can be effectively eliminated by eliminating dangling electrodes in the dummy pixel; compared with the prior art, the electrical stability of the liquid crystal display panel is greatly improved.

The invention discloses a preparation method of a ceramic substrate for medium-free copper-cladding gold-deposited light-emitting diode (LED) package. The preparation method comprises the following steps of sintering a ceramic wafer, in which ceramic powder is subjected to die forming and then placed in an environment at 1,000-1,020 DEG C for sintering for 8 to 10 minutes to obtain the ceramic wafer; coating copper, in which copper is coated on the upper surface of the ceramic wafer by a vacuum mist plating method to form a copper foil; etching, in which the useless copper foil is corroded with dilute sulphuric acid according to a process flow diagram to reserve the useful copper foil as a circuit; depositing gold, in which gold liquid medicine passes through the substrate with the circuit already etched so that the gold is deposited on the copper foil to obtain a finished product. According to the preparation method, a medium-free copper cladding technique is adopted, and the excellent heat conduction performance of primary copper and ceramic is maintained; and the gold is deposited on the copper, the chemical reaction of the gold is stable, the vulcanization problem is effectively solved, and the electrical property of the product and the long-term maintenance rate of light refraction are further improved.

The invention provides a preparation method of a semiconductor structure. The preparation method comprises the following steps of providing a semiconductor substrate, wherein an oxide layer is formedon at least a first part of the surface of the semiconductor substrate, and a photoresist layer is formed on at least the second part of the surface; removing the oxide layer with the partial thickness by wet etching so as to retain a residual oxide layer with a preset thickness; and removing the photoresist layer by dry etching. Due to the fact that the residual oxide layer with the preset thickness is still kept in the wet etching process, oxidation and loss of substrate silicon caused by direct exposure of the substrate silicon during dry etching can be prevented. According to the preparation method of the semiconductor structure, the oxide layer with the partial thickness is removed by wet etching, no other process steps need to be added or changed, and the electrical stability of thedevice can be improved on the premise that the cost is not increased.

The invention discloses a processing method of a flexible vibration sensor for monitoring Parkinson syndrome. The processing method includes the following steps of spin-coating photoresist, exposure,development, evaporation Ni film, removing glue and cleaning, growing CA self-crosslinking array, transferring to flexible substrate, clean and stripping, and sensor production. The flexible vibrationsensor produced by the processing method has the advantages of low power consumption, high stability and high sensitivity, so that the flexible vibration sensor has huge application potential in wearable health monitoring and has great potential in the direction of manufacturing low-cost and durable flexible sensors.

The invention provides a method for preparing a flexible electron. The method comprises the following steps: S1, pouring liquid GaIn liquid metal or liquid GaInSn liquid metal into a silicone tube by using a negative pressure method; s2, the silicone tube filled with the liquid metal is stored in a low-temperature environment until the liquid metal is crystallized and solidified; s3, the crystallized and solidified liquid metal is taken out of the silicone tube, and a metal wire is obtained; s4, constructing a circuit pattern by using metal wires to obtain a target circuit; s5, using liquid silica gel to package the target circuit; and S6, after the liquid silica gel is cured, heating is carried out, so that the solid metal wires are molten into liquid, and the flexible electron is obtained. The invention also provides a flexible electronic equipment. The method has the beneficial effects that the manufacturing process for preparing the flexible electronics from the liquid metal can be simplified, the yield is improved, and the cost is reduced.

The invention discloses a semiconductor structure and its manufacturing process. The semiconductor structure includes a base, a dielectric layer and a fluorine-containing metal layer. The dielectric layer is on the substrate. A fluorine-containing metal layer is on the dielectric layer. In addition, the present invention also provides a semiconductor manufacturing process, which can form the aforementioned semiconductor structure.

Provided are a mercury-free silver oxide button cell and a preparation method thereof. A preparation method of zinc gel of the cell comprises the steps that 1, an electrolyte is prepared, wherein potassium hydroxide and zinc oxide are added into water by mass, and the electrolyte is obtained after potassium hydroxide and zinc oxide are completely dissolved; 2, lead-free mercury-free zinc powder, polyacrylic acid, polyacrylate, indium hydroxide and indium oxide are put into a stirring tank of a zinc mixer by mass and stirred and mixed to be uniform, the zinc powder mixture is obtained, the electrolyte is added into the stirring tank slowly, the materials are stirred to be uniform, vacuumizing is conducted, and the zinc gel of the mercury-free silver oxide button cell is obtained. Compared with the prior art, the zinc gel of the mercury-free silver oxide button cell is formed by mixing and vacuum stirring the zinc powder mixture and the electrolyte, the formula of the raw materials is reasonable, the expansion rate of the obtained zinc gel is small, and the storing time of the prepared mercury-free silver oxide button cell is long.

The invention relates to a conductive carbon paste for a flexible pressure sensor, a preparation method thereof, and a pressure sensor. In terms of mass percentage, the raw material formula of the conductive carbon paste includes the following components: 1-25% of graphene, 0.04% of carbon nanotube ~1.5%, dispersant 0.001~1%, oleoresin 5~45%, thickener 1~10%, coupling agent 0.01~5%, first solvent 25~70% and second solvent 20~40%. The conductive carbon paste of the present invention adds graphene sheets and a small amount of carbon nanotubes to the resin system, and cooperates with the use of dispersants, coupling agents and plasticizers, so that the prepared conductive carbon paste has high sensitivity and high stability , low minimum detection limit, bending resistance, strong adhesion with flexible substrates, etc. Under the action of pressure, the conductive network formed by graphene and carbon nanotubes in the cured conductive carbon paste resin system changes, and the cured conductive carbon paste has increased resistance, high pressure sensitivity, and small pressure changes can be sensed.

The invention relates to a method for improving a gap filling capability. The method comprises the following steps: step one, carrying out etching to form a spacer region having a certain depth-to-width ratio; step two, carrying out secondary etching on the spacer region; and step three, carrying out corresponding filling on the spacer region according to the requirement of the method. According to the method, primary and secondary etching or acid pickling processes are added based on the traditional method; the depth-to-width ratio of the spacer region is reduced; and the gap filling capability during the chip manufacturing is enhanced. The possibility of hole occurrence during the filling process is reduced with the enhancement of the gap filling capability, so that the possibility of occurrence of problems of short circuit and the like due to the hole existence is also reduced; and hence, the electrical stability of the chip is enhanced, thereby improving the yield of the finished chip and the economic benefits.

The invention discloses an organic thin film transistor, comprising a substrate, a source / drain layer, a first buffer layer, a semiconductor layer, a gate insulating layer, and a gate electrode, wherein the source / drain layer is located on the substrate and has a source region and a drain region; the first buffer layer is located between the source region and the drain region and covers at least part of the source region and at least part of the drain region; the semiconductor layer is located on the source / drain layer and the first buffer layer; the first buffer layer is located among the semiconductor layer, the source region, the drain region, and the substrate; the gate insulating layer covers the source / drain layer and the semiconductor layer; the gate electrode is located on the gateinsulating layer, and part of the gate insulating layer is located between the gate electrode and the semiconductor layer; and the first buffer layer may be used to fill the space between the sourceregion and the drain region to prevent the semiconductor layer from being formed on the wedge undercut structure of the source region and the drain region, so that the semiconductor layer has an eventhickness to improve the electrical stability of the organic thin film transistor.

The invention discloses a sample preparation method, and the method comprises the steps: providing a semiconductor structure which comprises a stacking structure, a channel structure penetrating through the stacking structure, and a channel contact located on the channel structure, wherein the stacked structure comprises gate layers and dielectric layers which are alternately stacked; performing first sample preparation processing on the semiconductor structure to form a cross section exposing the stack structure and a part of the channel contact; removing the gate layer in the semiconductor structure and the exposed part of the channel contact through an etching solution, and reserving the unexposed channel contact; and carrying out second sample preparation treatment on the semiconductor structure, so that a to-be-tested sample obtained through treatment comprises the channel structure and the channel contact located on the channel structure.

The present invention provides an array substrate and a display panel, wherein the array substrate includes: a plurality of scanning lines and a plurality of data lines respectively intersecting the plurality of scanning lines to define a plurality of pixel units; each pixel unit It includes a master pixel area and a slave pixel area, and the slave pixel unit includes a slave pixel electrode; a plurality of DBS electrode lines are arranged above the plurality of data lines; For the shared thin film transistor, the gate of the shared thin film transistor is connected to the corresponding scanning line, the source of the shared thin film transistor is connected to the slave pixel electrode, and the drain of the shared thin film transistor is connected to the corresponding DBS electrode line. The present invention removes the deep hole connection between the source or drain of the shared thin film transistor and the A-com common electrode in the prior art, increases the area of ​​the display area of ​​the product, increases the aperture ratio, and thus improves the electrical properties of the 3T structure design stability.

The invention provides an adhesive applicable to low temperature and used for electronic paper. The adhesive comprises a waterborne polyurethane emulsion which is prepared from diisocyanate, polyester polyol with number-average molecular weight of 300 to 3000, polyether polyol with number-average molecular weight of 400 to 3000, a chain extender and a salt forming agent through polymerization, emulsification and dispersion. The invention also provides a preparation method for the adhesive and application of the adhesive in an electrophoretic display apparatus. The electrical properties of the adhesive for the electronic paper have small fluctuation with changes of temperature, and volume resistivity of the adhesive at about 0 DEG C changes a little compared with volume resistivity of the adhesive at normal temperature. The adhesive for the electronic paper can be used as a lamination adhesive in the electrophoretic display apparatus, enables the contrast of the electrophoretic display apparatus to be maintained in a good range when the electrophoretic display apparatus is used at a low temperature (about 0 DEG C) and improves adaptability of the electrophoretic display apparatus to the environment.

The present application discloses a method for preparing a sample, the method comprising: providing a semiconductor structure, the semiconductor structure including a stack structure, a channel structure penetrating the stack structure, and a channel contact on the channel structure; The stacked structure includes alternately stacked gate layers and dielectric layers; a first sample preparation process is performed on the semiconductor structure to form a cross section that exposes the stacked structure and a part of the channel contact; removed by an etching solution the gate layer and the exposed part of the channel contacts in the semiconductor structure, leaving the unexposed channel contacts; and performing a second sample preparation process on the semiconductor structure, so that the processed A sample includes the channel structure and the channel contact on the channel structure.

The embodiment of the invention discloses an array substrate and a manufacturing method of the array substrate. The array substrate comprises a substrate, a buffer layer, a semiconductor layer, an insulating layer and a grid layer. The buffer layer is arranged on the substrate; the semiconductor layer is arranged on the buffer layer; the insulating layer covers the buffer layer and the semiconductor layer; the grid electrode layer is arranged on the insulating layer; the semiconductor layer comprises a current carrier channel; the carrier channel is located on one side, facing the insulating layer, of the semiconductor layer; the insulating layer comprises a first thin film layer and a second thin film layer; the first thin film layer covers the semiconductor layer and the buffer layer; the second thin film layer covers the first thin film layer; the grid electrode layer is located on the second thin film layer; the density of the first thin film layer is larger than that of the secondthin film layer; and the carrier channel is connected with the first thin film layer. According to the scheme, the electrical stability of the array substrate can be improved.

The invention discloses a BOPET (biaxially-oriented polyethylene terephthalate) film with stable electrical performance and a preparation method of BOPET film. The BOPET film is prepared from super-bright PET chips containing magnesium acetate, high-concentration nanoscale silicon oxide PET chips and low-concentration silicon oxide PET chips through mixing in a certain ratio, drying, extrusion, filtering, metering, refiltering, film casting, longitudinal drawing, horizontal drawing, hot setting, winding and cutting. Under the condition of thickness guarantee, the BOPET film has higher tensile strength, excellent temperature resistance, stable electrical performance and good workability in follow-up procedures, and is a substrate film applicable to electrical engineering such as capacitors, thermal insulation materials and the like.

The invention discloses a formation method of a silicon oxide film, comprising the following steps of: providing a substrate, placing the substrate into a film deposition chamber, vacuumizing the deposition chamber, heating the deposition chamber, introducing silicane and oxygenous gas to the deposition chamber, wherein the flow ratio of silicane to oxygenous gas is between 1:800 and 1:125, introducing energy to the deposition chamber to deposit the film, and taking out the substrate with the deposited film. The invention also discloses a corresponding formation method of a metal-insulator-metal capacitor. The metal-insulator-metal capacitor formed by using the silicon oxide film method reduces and stabilizes a voltage coefficient of capacitance and a temperature coefficient of capacitance of the capacitor, improves the dynamic characteristics of the capacitor and enhances the electrical property stability of the capacitor.