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Method for optimizing integrated circuit screening

An integrated circuit and circuit technology, applied in the field of optimizing integrated circuit screening, can solve problems such as meaninglessness, and achieve the effect of increasing reliability

Pending Publication Date: 2019-06-07
SINO IC TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this traditional method also requires that the circuit must have a mark and can be distinguished. If there is no mark and cannot be distinguished, then the secondary screening done offline is meaningless

Method used

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  • Method for optimizing integrated circuit screening
  • Method for optimizing integrated circuit screening

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Experimental program
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Embodiment

[0016] see figure 1 and figure 2 , the present invention provides a method for optimizing integrated circuit screening, comprising the following steps:

[0017] In the process of circuit testing, all test items of the circuit to be judged are tested to determine whether the circuit to be tested is a good product; a quality factor is set for the circuit to be tested that meets the standard of good product, and the test values ​​of important parameters are extracted during the test and stored in In the memory; the parameter values ​​of the tested circuits in the memory form an increasing sample set, each time a circuit is tested, the sample set in the memory will increase, read out the sample set and calculate each The quality factor of each circuit; use statistical standards to compare and judge the quality factor of the circuit, and according to the situation of the quality factor, further set the secondary screening conditions for distinguishing good circuits; further set m...

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Abstract

The invention discloses a method for optimizing integrated circuit screening, which comprises the following steps of: setting a quality factor, extracting test values of important parameters in a testprocess, and storing the test values into a storage; the parameter values of the circuits tested in the storage device form a sample set which is continuously increased, the sample set is read out, and the quality factor of each circuit is calculated according to the sample condition; standard using statistics, comparing and judging the quality factor of the circuit; according to the condition ofa quality factor; a secondary screening condition for distinguishing good product circuits is further set. According to the invention, only the link of probability statistical analysis is added. In the testing process, the good products are screened again. Compared with the prior art, the method has the advantages that the performance of the circuit is more accurately analyzed and judged, later manual screening and analysis are not needed, the method is very flexible, circuits of different batches can be screened according to the method, the screening standard can be changed according to requirements of different products, and the reliability of a test result is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit detection, in particular to a method for optimizing integrated circuit screening. Background technique [0002] With the rapid development of the current domestic integrated circuit industry, the performance requirements of the circuit are getting higher and higher, and the requirements for the rigor and accuracy of the test are also getting higher and higher. In the integrated circuit test, the test program usually consists of multiple test items, which fully detect whether the circuit performance meets the standard from all aspects, and the result can intuitively reflect whether the circuit is a good product. The detailed data of the test results can fully reflect the structure, function and specific electrical characteristics of each circuit. Through the detailed data, the parameter characteristics of key concerns can be further analyzed and screened. [0003] In the integrated circ...

Claims

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Application Information

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IPC IPC(8): G06F11/22
Inventor 崔孝叶邓维维余琨王华周官宏叶建明
Owner SINO IC TECH
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