Variable-speed multi-channel debugging and tracking system, method, equipment and storage medium

Abstract

The invention relates to a variable-speed multi-channel debugging and tracking system, comprising: a tracking source module, used to send tracking data; a counter module, used to send time stamp information; a cache module, used to cache and output the tracking data and the time Click on the information. The system proposed by the present invention adopts the first-in-first-out buffer of the synchronous clock, which can receive one or more data at the same time, and output one data, which has the function of variable speed transmission; each data carries source channel information, and can be stored in the buffer module The public memory of the public memory is clearly marked for the corresponding data, and the subsequent circuit can classify the data for processing; the number of output data is output at the same time as each read operation, and the number of serial output data is clearly defined, which is easy for the subsequent circuit to process data. Processing; while outputting data, a backpressure signal is output. When multiple data are serially output, the backpressure signal is used to notify the outside world that a new read operation cannot be initiated.

Description

technical field [0001] The invention belongs to the technical field of communication, and in particular relates to a variable-speed multi-channel debugging and tracking system, method, equipment and storage medium. Background technique [0002] Related chips of existing communication systems are usually relatively complex, including both hardware design and software design. The system on the chip is relatively large, and its design and debugging involve a large number of modules, and failures cannot be handled in a timely manner. For example, for complex software faults such as software runaway, there are two traditional fault tracking methods. One is to use the ICE debugging tool that comes with the processor to record all instructions for analysis. All instructions are recorded, the amount of information is too large, and the records are not focused. It is not easy to find problems in the communication system; in addition, ICE debugging tools are also very expensive. Ano...

AI Technical Summary

Problems solved by technology

The existing FIFO cache design only provides a common storage area and does not identify the source of information, thus requiring multiple FIFO caches to process multi-channel information in parallel. The FIFO control logic of the same function is repeated, resulting in an increase in chip area

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