Fast Montgomery modular multiplier operation optimization method suitable for national cryptographic sm2p256v1 algorithm
An optimization method and a technology of a modular multiplier, which are applied in calculations using residual algorithms and calculations using non-numerical representations, etc., can solve problems such as high chip power consumption, increased time complexity, and poor system performance, and reduce The effects of manufacturing costs, reducing power consumption, and improving computing efficiency
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[0024] The present invention is further described, but the protection scope of the present invention is not limited to the following description.
[0025] The object of the invention of the present invention is achieved through the following technical solutions: the fast Montgomery modular multiplier operation optimization method suitable for the national secret sm2p256v1 algorithm is realized by the Montgomery modular multiplier in the information security chip, and through the optimized operation method, the chip is reduced The operation power consumption of is characterized in that, the Montgomery multiplier operation comprises the following steps:
[0026] S1: carry out initialization operation;
[0027] S2: Complete the large number multiplication operation;
[0028] S3: Carry out a cyclic accumulation calculation;
[0029] S4: Perform an unsigned large number subtraction operation.
[0030] Further, the initialization operation is specifically: first initialize Z=(Z ...
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