Semiconductor memory device and method of operating the same
A technology of a storage device and an operation method, which is applied to measurement devices, information storage, memory systems, etc., to achieve the effect of ensuring accuracy
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[0054] The configuration of the main part of the flash memory of the embodiment of the present invention is shown in figure 2 . However, the configuration of the flash memory shown here is an example, and the present invention is not necessarily limited to this configuration.
[0055] The flash memory 100 of the present embodiment includes the following structures: a memory cell array 110, wherein a plurality of memory cells are arranged in a matrix; an input-output buffer 120, connected to an external input-output terminal I / O; an address register (address register) 130 , receive address data from the I / O buffer 120; the controller 140 receives command (command) data from the I / O buffer 120 to control each part; the word line selection circuit 150 receives the row address information Ax from the address register 130, The address information Ax is decoded (decode), and based on the decoding result, block selection and word line selection, etc. are performed; the page buffer / ...
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