Three-end compact and compound SCR device for whole-chip ESD protection

Abstract

The present invention belongs to the technical field of electrons, especially relates to the design of an ESD (Electro-Static discharge) protection circuit, and especially provides a three-end compactand compound SCR device (CCSCR) for whole-chip ESD protection. The three-end compact and compound SCR device comprises a main discharge CCSCR and a RC auxiliary trigger detection circuit; the main discharge CCSCR is a three-end device, three parasitic SCR pathways are introduced on the basis of the CMOS device structure so that the whole-chip ESD protection with high robustness is achieved in a smaller territory area; the RC auxiliary trigger detection circuit is introduced to further reduce the triggering voltage of the device; and besides, the CCSCR can be taken as a two-end device to supply ESD protection between any one IO port and a power supply.

Description

technical field [0001] The invention belongs to the field of electronic technology, and in particular relates to the design of an electrostatic discharge (Electro-Static discharge, ESD for short) protection circuit, especially a silicon controlled rectifier SCR (Silicon Controlled Rectifier for short SCR) used for full-chip ESD protection. Background technique [0002] In the process of semiconductor chip manufacturing, packaging and transportation, and user use, ESD phenomena are ubiquitous; the instantaneous high-voltage electrostatic pulse generated by ESD can flow into the chip through the pins of the chip, causing gate oxide breakdown and damage to the internal circuit of the chip. unable to work properly. In recent years, with the rapid development of the electronics industry, the line width of integrated circuits has been further reduced, the integration level of chips has been further increased, and the gate oxide layer of MOSFET devices has become thinner and thinne...

AI Technical Summary

Problems solved by technology

[0005] In the full-chip ESD protection circuit, a single device is required between IO and VDD and VSS as an ESD protection device, which occupies a large chip area. In addition, in order to quickly discharge the ESD current under ESD stress conditions, it is necessary to An effective ESD clamp circuit is repeatedly inserted between the VDD and VSS supply lines at a suitable distance to provide a low impedance path between the VDD and VSS supply lines, which also consumes a lot of chip area

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