A multi-mode hdlc controller based on fpga

A controller and multi-mode technology, applied in the field of data communication, can solve the problems of single function, cumbersome debugging, complicated design, etc., and achieve the effect of enriching hardware resources, reducing design complexity and simple design

Active Publication Date: 2021-09-07
HARBIN INST OF TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The present invention is to solve the problem that each module in the HDLC controller implemented by FPGA is simply described sentence by sentence through HDL, resulting in complex design, cumbersome debugging and single function. The present invention provides a multi-mode HDLC controller based on FPGA device

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  • A multi-mode hdlc controller based on fpga
  • A multi-mode hdlc controller based on fpga
  • A multi-mode hdlc controller based on fpga

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Embodiment Construction

[0057] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0058] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0059] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0060] see figure 1 Describe this embodiment, a kind of multi-mode HDLC controller based on FPGA described...

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Abstract

An FPGA-based multi-mode HDLC controller relates to the field of data communication. It solves the problem that each module in the HDLC controller implemented by FPGA is simply described sentence by sentence through HDL, which leads to complex design, cumbersome debugging and single function. The FPGA of the present invention includes an HDLC protocol transmission unit, a data cache unit and a main control unit; the HDLC protocol transmission unit includes an HDLC data transmission module and an HDLC data reception module; when the controller is used to send HDLC data to a device communicating with it, the HDLC data transmission module Convert the written parallel data into serial data, and encode the serial data into HDLC frames. When the controller is used to receive the HDLC data sent by the device communicating with it, the HDLC data receiving module converts the received serial data into Parallel data, and decode the parallel data. The invention is mainly used for data communication.

Description

technical field [0001] The invention relates to the field of data communication, in particular to an FPGA-based multi-mode HDLC controller. [0002] The English full name of FPGA is: Field Programmable Gate Array, FPGA, the Chinese translation is: Field Programmable Gate Array, the English full name of HDLC is: High-level Data Link Control, and the Chinese translation is: Advanced Data Link Control. Background technique [0003] HDLC is a typical protocol of a bit-oriented data link control protocol, which does not depend on any character encoding set. The HDLC protocol has the characteristics of strong error detection capability and high synchronous transmission rate, and has a very wide range of applications in the communication field. [0004] Traditionally, there are two ways to implement the HDLC protocol: software implementation and hardware implementation. The software method is mainly realized by CPU (Central Processing Unit, CPU) or DSP (Digital Signal Processing,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00G05B19/05G06F12/0846
CPCG05B19/05G06F12/0846H04L1/004H04L1/0061H04L1/0083
Inventor 梁军崔秀海赵金帅彭宇彭喜元
Owner HARBIN INST OF TECH
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