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Method for fabricating semiconductor device channel, semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, which is applied in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve the problems that cannot be formed at the same time, complex process flow, etc., and achieve the effect of reducing process complexity

Active Publication Date: 2019-09-20
SHANGHAI IND U TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When forming a device on a semiconductor substrate, the transistor channels in the core area and the input and output areas cannot be formed at the same time due to the different gate lengths, which makes the process more complicated.

Method used

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  • Method for fabricating semiconductor device channel, semiconductor device and manufacturing method thereof
  • Method for fabricating semiconductor device channel, semiconductor device and manufacturing method thereof
  • Method for fabricating semiconductor device channel, semiconductor device and manufacturing method thereof

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Embodiment Construction

[0075] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0076] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0077] If it is to describe the situation directly on another layer or an...

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PUM

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Abstract

Disclosed is a method for fabricating a semiconductor device channel, comprising the steps of: forming a first epitaxial layer on a semiconductor substrate; forming a second epitaxial layer and a third epitaxial layer at two positions on the first epitaxial layer corresponding to the first region and the second region of the semiconductor substrate respectively, wherein the height of the second epitaxial layer is greater than the height of the third epitaxial layer; and forming a fourth epitaxial layer on the second epitaxial layer and the third epitaxial layer, wherein the second epitaxial layer and the third epitaxial layer provide the channel of a transistor. The method for fabricating the semiconductor device channel forms the second and third epitaxial layers of different heights in the first region and the second region of the substrate respectively, so as to simultaneously form transistor channels of different gate lengths in the Core and IO regions of the semiconductor device and reduce process complexity.

Description

technical field [0001] The invention relates to the technical field of semiconductor devices, in particular to a method for manufacturing a channel of a semiconductor device, a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, continuously reducing the size of devices and increasing integration to obtain better performance have become the goal of integrated circuit technology and the driving force for development. The most basic unit in an integrated circuit is a metal-oxide-semiconductor field effect transistor (MOSFET), and a vertical field effect transistor (Vertical Field Effect Transistor, VFET) is a three-dimensional structure, which can improve integration. [0003] The vertical field effect transistor is formed on the surface of the semiconductor substrate, and the semiconductor substrate includes a Core area (core area) and an IO area (input-output area). When forming ...

Claims

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Application Information

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IPC IPC(8): H01L21/8234H01L27/088
CPCH01L21/823412H01L21/823456H01L21/823487H01L27/088
Inventor 余自强
Owner SHANGHAI IND U TECH RES INST