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Block management method, memory control circuit unit and memory storage device

A management method and control circuit technology, applied in memory systems, instruments, electrical digital data processing, etc., can solve problems such as shortened life of flash memory storage devices and limited erasing times

Active Publication Date: 2019-09-24
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the erasing times of the physical block are limited (for example, the physical block will be damaged after being erased 10,000 times), so under the condition of frequently erasing the physical block, the lifespan of the flash memory storage device will be reduced. greatly shortened

Method used

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  • Block management method, memory control circuit unit and memory storage device
  • Block management method, memory control circuit unit and memory storage device
  • Block management method, memory control circuit unit and memory storage device

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Experimental program
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Embodiment Construction

[0103] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit unit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0104] figure 1 is a schematic diagram of a host system, a memory storage device, and an input / output (I / O) device according to an exemplary embodiment, and figure 2 It is a schematic diagram showing a host system, a memory storage device and an input / output (I / O) device according to another exemplary embodiment.

[0105] Please refer to figure 1 and figure 2, the host system 11 generally includes a processor 111 , a random access memory (random access memory, RAM) 112 , a read only memory (read only memory, ROM) 113 and a data transmission interface 114 . The processor 111 , random access memory 112 , ROM 113 and data transmission ...

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PUM

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Abstract

The invention provides a block management method, a memory control circuit unit and a memory storage device, for managing a plurality of entity blocks in a rewritable nonvolatile memory module. The block management method comprises the following steps: reading user data from a first entity block in a plurality of entity blocks to obtain a plurality of parameters corresponding to the first entity block; inputting a plurality of parameters corresponding to the first entity block into a block recognition machine learning model so as to group the first entity block into a first block group or a second block group according to an output result of the block recognition machine learning model; establishing a first block mapping table and a second block mapping table; and mapping the logic address of the first block mapping table to the entity block belonging to the first block group, and mapping the logic address of the second block mapping table to the entity block belonging to the second block group.

Description

technical field [0001] The present invention relates to a block management method, a memory control circuit unit and a memory storage device, in particular to a machine learning-based block management method, a memory control circuit unit and a memory storage device. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built in the various memory modules listed above. in portable multimedia devices. [0003] Flash memory is usually divided into multiple physical blocks. Generally speaking, a physical block is the smallest unit of erasing in a flash memory. That is, each physical block contains the minimum number of memory cells to be erased t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F12/02G06F11/10
CPCG06F3/064G06F3/0652G06F3/0679G06F12/0246G06F12/1009G06F11/1012G06F11/1068
Inventor 林小东李明彦李国荣
Owner PHISON ELECTRONICS
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