Chip packaging structure and manufacturing method thereof
A technology of chip packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., and can solve the problems of low rigidity and poor heat dissipation.
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Embodiment 1
[0033] This embodiment provides a novel chip packaging structure, such as figure 1 As shown, it includes a first chip body 42 and a second chip body 43 arranged adjacently, the bottom surface of the first chip body 42 is bonded with the first conductive glue 40, and the top surface of the second chip body 43 is bonded with the first conductive glue. Two conductive glue 41, the first conductive glue 40 is arranged on the first conductive layer 20, the second conductive layer 21 is arranged on the second conductive glue 41, the first conductive layer 20, the second conductive layer The layer 21 has a first opening and a second opening respectively, and the insulating layer 60 fills the space between the first chip body 42, the second chip body 43, the first conductive layer 20 and the second conductive layer 21. Voids, the insulating layer 60 has through holes respectively formed on the first chip body 42, the second chip body 43, the first conductive layer 20, and the second co...
Embodiment 2
[0037] This embodiment provides a method for manufacturing a novel chip packaging structure, such as Figure 2-12 shown, including the following steps:
[0038] S101. Provide the first detachable material layer 10 and the second detachable material layer 11 respectively as reinforcing carriers, such as figure 2 shown;
[0039] S102. Forming a first conductive layer 20 and a second conductive layer 21 on the first separable material layer 10 and the second separable material layer 11 respectively, such as image 3 shown;
[0040]S103. Pattern the first conductive layer 20 and the second conductive layer 21 respectively to form a first opening and a second opening to expose part of the first separable material layer 10 and the second separable material layer. Material layer 11, such as Figure 4 shown;
[0041] S104. Adhere the first conductive glue 40, the second conductive glue 41, the first chip body 42, the second Chip body 43, such as Figure 5 shown;
[0042] S105...
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