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Analog circuit fault feature range determination method based on genetic algorithm

A technology for simulating circuit faults and determining methods, which can be used in the direction of analog circuit testing, genetic rules, gene models, etc., and can solve problems such as inability to obtain accurate ranges

Active Publication Date: 2019-11-19
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

However, the fault eigenvectors are often high-dimensional, and the traditional Monte Carlo simulation method obviously cannot obtain an accurate range, and further improvement is needed

Method used

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  • Analog circuit fault feature range determination method based on genetic algorithm
  • Analog circuit fault feature range determination method based on genetic algorithm
  • Analog circuit fault feature range determination method based on genetic algorithm

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Embodiment

[0047] In order to better illustrate the technical contents and invention points of the present invention, the theoretical derivation process of the present invention will be described first.

[0048] figure 1 is the analog circuit diagram. Such as figure 1 As shown, N represents a linear time-invariant circuit, which consists of an independent voltage source excitation. Indicates the output voltage phasor on the selected measuring point, and x is a passive component. According to the substitution theorem, the passive element x can be replaced by an independent voltage source with the same voltage across its terminals, resulting in an equivalent circuit. figure 2 yes figure 1 Equivalent circuit diagram of the analog circuit shown. According to Thevenin's theorem, any active linear time-invariant port network can be equivalently replaced by a series branch of a voltage source and an impedance, so:

[0049]

[0050] in, yes figure 2 Open-circuit voltage phasor o...

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Abstract

The invention discloses an analog circuit fault feature range determination method based on a genetic algorithm. The method comprises the steps of firstly performing fuzzy group analysis on an analogcircuit, thus acquiring the information of each fuzzy group; respectively performing the genetic algorithm on a representative element of each fuzzy group once, and thus acquiring a boundary vector ofthe convex region of each fuzzy group circle model parameter feature vector range; and when the genetic algorithm is operated each time, using the element parameter vector as the individual of a fuzzy group population, acquiring a circle model parameter corresponding to each individual, and optimizing the individual according to the circle model parameter. According to the method, the analog circuit fault feature vector range under the influence of tolerance is acquired through combining the circle model parameter with the genetic algorithm, and an accurate fault dictionary is provided for fault diagnosis.

Description

technical field [0001] The invention belongs to the technical field of fault diagnosis of analog circuits, and more specifically relates to a method for determining the characteristic range of faults of analog circuits based on a genetic algorithm. Background technique [0002] With the rapid development of integrated circuits, in order to improve product performance, reduce chip area and cost, it is necessary to integrate digital and analog components on the same chip. According to data reports, although the analog part only accounts for 5% of the chip area, its fault diagnosis cost accounts for 95% of the total diagnostic cost. Analog circuit fault diagnosis has always been a "bottleneck" problem in the integrated circuit industry. At this stage, some well-developed analog circuit fault diagnosis theories have been applied to practice, such as: fault dictionary method in pre-test analog diagnosis method, component parameter identification method and fault verification meth...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/316G06N3/12
CPCG01R31/316G06N3/126
Inventor 杨成林周秀云刘震
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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