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Substrate manufacturing method and substrate bonding method

A technology of manufacturing method and bonding method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems such as affecting bonding strength

Active Publication Date: 2021-07-23
淮安西德工业设计有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, voids will appear on the contact surface after the substrate is bonded, affecting the bonding strength

Method used

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  • Substrate manufacturing method and substrate bonding method
  • Substrate manufacturing method and substrate bonding method
  • Substrate manufacturing method and substrate bonding method

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Embodiment Construction

[0018] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of the components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise. Additionally, techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the authorized specification.

[0019] The words "front," "rear," "top," "bottom," "over," "under," etc. in the specification and claims, if present, are used for descriptive purposes and not necessarily to describe an invariant relative position. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the ...

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Abstract

A method for manufacturing a substrate, comprising: a method for manufacturing a substrate, characterized in that it includes: providing a semiconductor substrate, the semiconductor substrate including a first dielectric layer having a recess and a first metal layer disposed in the recess , the first metal layer includes a first metal; a second dielectric layer is formed on the semiconductor substrate to cover the first dielectric layer and the first metal layer; a second dielectric layer is formed in the second dielectric layer an opening, the first opening exposing at least a portion of the upper surface of the first metal layer; chemically treating the first metal layer to form a compound of the first metal; and forming a second metal layer, The second metal layer covers at least the compound of the first metal. The substrate may be a wafer.

Description

technical field [0001] The present disclosure relates to a substrate manufacturing method and a substrate bonding method. Background technique [0002] In prior art techniques utilizing metal-metal bonding of substrates (eg, wafers), after chemical mechanical polishing (CMP) to planarize the substrate surface, the metal surface may be dished (for copper (Cu)) in particular. Therefore, voids appear on the contact surface after the substrates are bonded, which affects the bonding strength. Therefore, in order to realize Cu-Cu bonding, there is a high requirement for the surface morphology of the copper wire, which cannot be protruded or recessed too much. [0003] On the other hand, at the same time, during the Cu-Cu bonding process, if the surface of the copper wire is oxidized, the surface resistivity will increase sharply, and a higher temperature will be required to realize the Cu-Cu bonding. [0004] Accordingly, there is a need for improved substrate bonding technique...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L21/76847H01L21/76879
Inventor 司阳陈世杰黄晓橹
Owner 淮安西德工业设计有限公司