Implementation device of privacy amplification algorithm based on FPGA + RISC-V

A RISC-V and privacy amplification technology, which is applied in the field of implementation devices for privacy amplification algorithms, can solve the problems of insufficient calculation speed of large-scale matrices, and does not support adjustable speed, etc.

Active Publication Date: 2019-11-29
SHANDONG INSPUR SCI RES INST CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Existing privacy amplification algorithm implementation methods usually do not support

Method used

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  • Implementation device of privacy amplification algorithm based on FPGA + RISC-V
  • Implementation device of privacy amplification algorithm based on FPGA + RISC-V

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Embodiment Construction

[0021] The invention provides a device for implementing a privacy amplification algorithm based on FPGA+RISC-V, which includes a RISC-V processor and an FPGA. The FPGA includes a privacy amplification calculation module, and the privacy amplification calculation module includes a PE control module and a PE module,

[0022] The RISC-V processor issues the implementation instructions of the privacy amplification algorithm according to the requirements of the front-end data generation system, and the PE control module in the privacy amplification calculation module turns on the PE module according to the implementation instructions issued by the RISC-V processor, and according to the resources of the FPGA Consume and adjust the number of opened PE modules. All opened PE modules form an overall PE module. The overall PE module is multiplexed according to the issued implementation instructions to complete the requirements of the front-end data generation system.

[0023] At the same time...

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Abstract

The invention discloses an implementation device of a privacy amplification algorithm based on FPGA + RISC-V, and relates to the field of data processing. The system comprises an RISC-V processor andan FPGA. RISC-V is used as a core processor; wherein the FPGA is mainly used for realizing a calculation task of a privacy amplification algorithm; the RISC-V realizes scheduling and management tasksof the algorithm; the PE control module of the FPGA starts the PE module according to an implementation instruction issued by the RISC-V processor; the number of the started PE modules is adjusted according to the resource consumption of the FPGA; all the opened PE modules form an integral PE module; the whole PE module performs multiplexing according to the issued implementation instruction to meet the requirements of a front-end data generation system; by utilizing the device, a privacy amplification algorithm can be realized, the flexibility is high, the algorithm speed can be adjusted according to equipment requirements, the device is applied to a quantum random number generator and QKD equipment in quantum communication, and high-speed data generation and transmission are facilitated.

Description

Technical field [0001] The invention discloses a device for implementing a privacy amplification algorithm based on FPGA+RISC-V, and relates to the field of data processing. Background technique [0002] The RISC-V instruction set is an open instruction set architecture (ISA) based on the principle of reduced instruction set computing (RISC). RISC-V is a brand new instruction based on the continuous development and maturity of the instruction set. The RISC-V instruction set is completely open source, simple in design, easy to modular design, with a complete tool chain, and a large number of open source implementations and tapeout cases, which have been strongly supported by the community. [0003] FPGA (Field-Programmable Gate Array), the field programmable gate array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not onl...

Claims

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Application Information

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IPC IPC(8): G06N10/00G06F7/58
CPCG06N10/00G06F7/588
Inventor 秦刚姜凯赵鑫鑫王子彤李朋
Owner SHANDONG INSPUR SCI RES INST CO LTD
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