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Error check bit protocol converter

A protocol converter and error checking technology, which is applied in the direction of instrumentation, response error generation, error detection/correction, etc., can solve problems such as random failure of protocol conversion circuits, achieve high diagnostic coverage, and reduce common cause failure rate Effect

Active Publication Date: 2019-12-03
NANJING SEMIDRIVE TECH CO LTD
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  • Claims
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AI Technical Summary

Problems solved by technology

Since the error check bit protocols used by each module are not the same, different protocols need to be converted during the interconnection process of the modules, but the existing protocol conversion circuit itself also has the risk of random failure. Therefore, a reliable error code Protocol converters are becoming more and more important

Method used

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  • Error check bit protocol converter

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Embodiment Construction

[0025] Preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0026] Commonly used error check bits are divided into:

[0027] Error detection code (EDC), which can detect errors of no more than two bits in the data;

[0028] Error Correcting Code (ECC), which can detect no more than two bit errors in data and correct one bit error in data at the same time.

[0029] figure 1 It is a functional block diagram of the error-check bit protocol converter according to the present invention, as figure 1 As shown, the error check digit protocol converter of the present invention includes a first error detection and correction module 10, a check digit encoding module 20, a first delay module 30, a second delay module 40, and a fault diagnosis unit ...

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Abstract

An error check bit protocol converter comprises a first error detection and correction module, a check bit encoding module and a fault diagnosis unit, and is characterized in that the first error detection and correction module detects and corrects errors of input data and check bits; the check bit coding module is used for recoding the data output by the first error detection and correction module according to a lower-level coding protocol; and the fault diagnosis unit detects and corrects errors of the data output by the first error detection and correction module and the check bits output by the check bit encoding module, and reports an error detection result. According to the error check bit protocol converter, an extremely high diagnosis coverage rate is provided for check code protocol conversion, and the common cause failure rate is greatly reduced.

Description

technical field [0001] The embodiment of the present invention relates to the technical field of a system on chip (SoC), and in particular to the data correctness check of a virtualized system on chip. Background technique [0002] Error check bit technology is widely used in electronic and electrical systems to ensure the functional safety of the system. In order to ensure the correctness of the transmitted data, the system-on-chip will transmit the original data and the parity bit from the source to the destination at the same time. The correctness of the data is verified by the verification module at the destination end. [0003] As systems grow in complexity, modern designs rely more and more on reusing existing functional blocks. Since the error check bit protocols used by each module are not the same, different protocols need to be converted during the interconnection process of the modules, but the existing protocol conversion circuit itself also has the risk of ran...

Claims

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Application Information

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IPC IPC(8): G06F11/10
CPCG06F11/1048
Inventor 张力航谢俊谭腾飞
Owner NANJING SEMIDRIVE TECH CO LTD
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