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Memory and manufacturing method thereof

A manufacturing method and memory technology, which are applied to electric solid-state devices, semiconductor devices, electrical components, etc., can solve the problems of increasing difficulty, increasing the height of through holes, and adversely affecting memory performance, so as to reduce the difficulty of forming, reduce the process cost, and improve the performance of the memory. quality effect

Inactive Publication Date: 2019-12-20
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] As the demand for memory storage capacity continues to increase, the number of layers of the stacked structure formed on the substrate continues to increase, making the height of the through hole increase, which improves the formation of through holes with the same height and the formation of epitaxy at the bottom of the through hole. The difficulty of the layer reduces the uniformity of the via hole and the quality of the epitaxial layer, which adversely affects the performance of the memory

Method used

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  • Memory and manufacturing method thereof
  • Memory and manufacturing method thereof
  • Memory and manufacturing method thereof

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Embodiment Construction

[0047] The technical solutions of the present invention will be further described in detail below in conjunction with the drawings and embodiments. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0048] In the following paragraphs the invention is described more specifically by way of example with reference to the accompanying drawings. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustratin...

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Abstract

The embodiment of the invention discloses a memory and a manufacturing method thereof. The method comprises the steps of forming an epitaxial layer in a groove of a substrate; forming a protection layer covering the epitaxial layer in the groove; forming a stack structure on the protection layer, wherein the stack structure is used for forming a gate of a memory unit in the memory and the gate isused for controlling on or off of the memory unit; forming a through hole which penetrates through the stack structure and exposes the protection layer; removing the protection layer and exposing theepitaxial layer; and forming a channel region of the memory unit in the through hole, wherein the channel region is connected with the epitaxial layer and is used for the memory unit to store chargescorresponding to written data.

Description

technical field [0001] Embodiments of the present invention relate to the field of integrated circuits, in particular to a memory and a manufacturing method thereof. Background technique [0002] In the integrated circuit industry, the memory is prepared by forming a through hole through the stack structure, then forming an epitaxial layer at the bottom of the through hole, and forming a memory unit connected to the epitaxial layer in the through hole, which is conducive to improving the integration of the memory. [0003] As the demand for memory storage capacity continues to increase, the number of layers of the stacked structure formed on the substrate continues to increase, making the height of the through hole increase, which improves the formation of through holes with the same height and the formation of epitaxy at the bottom of the through hole. The difficulty of the layer reduces the uniformity of the height of the via hole and the quality of the epitaxial layer, wh...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11573H01L27/11575H01L27/11582H10B43/40H10B43/27H10B43/50
CPCH10B43/50H10B43/40H10B43/27
Inventor 罗佳明顾立勋徐融
Owner YANGTZE MEMORY TECH CO LTD
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