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Input vector-oriented RTL-level circuit reliability calculation method

A calculation method and input vector technology, applied in the direction of calculation, electrical digital data processing, special data processing applications, etc., can solve problems such as fast and effective evaluation of reliability that is no longer applicable, and achieve the effect of ensuring high precision characteristics

Inactive Publication Date: 2019-12-24
ZHEJIANG UNIV OF TECH
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Problems solved by technology

However, the improvement of the integration level makes the scale of the circuit expand accordingly, which makes the traditional method no longer suitable for the rapid and effective evaluation of the reliability of the current VLSI.

Method used

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  • Input vector-oriented RTL-level circuit reliability calculation method
  • Input vector-oriented RTL-level circuit reliability calculation method

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Embodiment Construction

[0034] The present invention will be further described below in conjunction with the accompanying drawings.

[0035] refer to figure 1 and figure 2 , an input vector-oriented RTL-level circuit reliability calculation method, comprising the following steps:

[0036] Step 1: Netlist analysis and initialization of related quantities, the process is as follows:

[0037] 1.1) Read the RTL-level circuit netlist and initialize the relevant variables;

[0038] 1.2) If all modules have been parsed, return the module linked list LC, and go to step 2; otherwise, extract the kth module of the circuit;

[0039] 1.3) If the end of the module netlist is reached, go to 1.7); otherwise, read the i-th record N of the netlist i ;

[0040] 1.4) If N i If it is a basic door unit, go to 1.5); otherwise, read the module unit information and go to 1.5);

[0041] 1.5) If the input sources of the node are known, then N i Put into the integrity linked list LC corresponding to the module k end ...

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Abstract

The invention discloses an input vector-oriented RTL-level circuit reliability calculation method. Based on the principle that the modules can be calculated, an integrity linked list corresponding toeach module is constructed for each module through a depth-first search algorithm, so that an input source of each module can be obtained from an upper-layer sub integrity linked list of the module. The smooth calculation of each module is guaranteed. Based on a recursion principle, the reliability of the circuit module is analyzed by means of an SCA method; according to the constructed integritylinked list, an iterative strategy is utilized to realize reliability calculation of the RTL-level circuit; for the extracted modules, a recursive algorithm is used for detection, when it is found that all composition units of some sub-modules are basic gates, an SCA method is called to carry out calculation to guarantee precision, and when a calculation result is fed back to the top-layer linkedlist, the next module is called to carry out iterative calculation until the end of the top-layer linked list is reached. The method is suitable for the calculation of a super-large-scale integrated circuit and the use of a parallel strategy, and is high in calculation precision.

Description

technical field [0001] The invention relates to the evaluation of the reliability of integrated circuits, in particular to an input vector-oriented RTL-level circuit reliability calculation method based on modular analysis. Background technique [0002] The pursuit of faster and smaller circuits has made the current technology develop in the direction of continuous reduction of the feature size of components and continuous improvement of circuit integration. This also makes the circuit more and more threatened by uncertain failure, thereby reducing the reliability tolerance of the circuit. Therefore, it is necessary to carry out evaluation research on the reliability level of integrated circuits in order to provide reference and basis for improving the reliability level of circuits in time. However, the increase in the integration level makes the scale of the circuit expand, which makes the traditional method no longer suitable for the rapid and effective evaluation of the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 肖杰季奇瓯孙紫文施展辉诸玮东周乾伟杨旭华
Owner ZHEJIANG UNIV OF TECH
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