Buffer design for package integration
A package and device technology, applied in the direction of electrical components, electrical solid devices, semiconductor devices, etc., can solve problems such as solder bridging, I/O pad number limitation, and solder ball number limitation
Active Publication Date: 2020-01-07
TAIWAN SEMICON MFG CO LTD
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- Abstract
- Description
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- Application Information
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Problems solved by technology
Due to the limited area of the die, the number of I / O pads is limited due to the pitch of the I / O pads
If the pitch of the pads is to be reduced, solder bridging may occur
In addition, under the fixed ball size requirement, the solder ball must have a certain size, which in turn limits the number of solder balls that can be packaged on the surface of the die
Method used
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Embodiment Construction
[0014] The following disclosure provides many different embodiments or examples for implementing different features of the present invention. Specific embodiments or examples of components and arrangements are described below to simplify the invention. Of course these are only examples and are not intended to be limiting. For example, the size of the element is not limited to the disclosed range or value, but may depend on the process conditions and / or the required performance of the device. In addition, in the following description, forming the first member above or on the second member may include an embodiment in which the first member and the second member are formed in direct contact, and may also include that the first member may be formed between the first member and the second member. An embodiment in which additional components are used so that the first component and the second component may not directly contact. For the purpose of simplicity and clarity, the variou...
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A method of forming a package includes the steps: bonding a device die to an interposer wafer, with the interposer wafer including metal lines and vias, forming a dielectric region to encircle the device die, and forming a through-via to penetrate through the dielectric region. The through-via is electrically connected to the first device die through the metal lines and the vias in the interposerwafer. The method further includes the steps: forming a polymer layer over the dielectric region, and forming an electrical connector. The electrical connector is electrically coupled to the through-via through a conductive feature in the polymer layer. The interposer wafer is sawed to separate the package from other packages.
Description
Technical field [0001] Embodiments of the present invention relate to buffer designs for package integration. Background technique [0002] With the development of semiconductor technology, semiconductor chips / dies become smaller and smaller. At the same time, more functions need to be integrated into the semiconductor die. Therefore, semiconductor dies need to have more and more I / O pads packaged into a smaller area, and the density of I / O pads increases over time. As a result, packaging of semiconductor dies becomes more difficult, which adversely affects the yield of packaging. [0003] Traditional packaging technologies can be divided into two categories. In the first category, the die on the wafer is packaged before sawing. This packaging technology has some advantageous features, such as higher yield and lower cost. In addition, less underfill or molding compound is required. However, this packaging technology also has disadvantages. As the size of the die becomes smal...
Claims
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IPC IPC(8): H01L21/56H01L21/60H01L23/31
CPCH01L21/561H01L24/97H01L23/3107H01L2224/18H01L21/6835H01L2221/68345H01L2221/68359H01L23/3128H01L25/105H01L25/0655H01L25/50H01L2225/1023H01L2225/1041H01L2225/1058H01L24/19H01L24/20H01L2924/15192H01L2924/181H01L23/5389H01L23/49816H01L24/24H01L2224/24137H01L2224/73267H01L2224/08225H01L24/08H01L2224/05647H01L2224/80895H01L2224/80896H01L24/80H01L24/83H01L2224/83896H01L2224/92244H01L24/73H01L24/05H01L2224/80447H01L2224/2919H01L2224/08237H01L2924/00012H01L2924/00014H01L23/481H01L23/5226H01L23/528H01L23/525H01L23/50H01L25/0657H01L25/18H01L21/4853H01L21/56H01L2225/1035H01L21/481
Inventor 陈洁陈宪伟陈明发余振华
Owner TAIWAN SEMICON MFG CO LTD