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Variable resistance non-volatile memory device

A non-volatile, memory technology, applied in the direction of electric solid state devices, circuits, electrical components, etc., can solve the problems of increased integration density and limitations of 2D semiconductor devices

Pending Publication Date: 2020-01-24
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the integration density of 2D semiconductor devices continues to increase but remains limited since extremely expensive equipment is required to form fine patterns

Method used

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  • Variable resistance non-volatile memory device

Examples

Experimental program
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Embodiment Construction

[0028] Hereinafter, embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0029] figure 1 is a perspective view schematically illustrating a variable resistance memory device (eg, a variable resistance nonvolatile memory device) according to some embodiments of the inventive concept.

[0030] refer to figure 1 , the first conductive line CL1 and the second conductive line CL2 may be provided. The second conductive line CL2 may cross the first conductive line CL1. The first conductive line CL1 may extend in the first direction D1. The first conductive line CL1 may include a first sub-conductive line CL1a disposed at one side of the second conductive line CL2 and a second sub-conductive line CL1b disposed at an opposite side of the second conductive line CL2. The second sub-conductor CL1b may be spaced apart from the first sub-conductor CL1a in a second direction D2 crossing the first direction D1. The first sub-cond...

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PUM

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Abstract

A variable resistance non-volatile memory device can include a semiconductor substrate and a plurality of first conductive lines each extending in a first direction perpendicular to the semiconductorsubstrate and spaced apart in a second direction on the semiconductor substrate. A second conductive line can extend in the second direction parallel to the semiconductor substrate on a first side ofthe plurality of first conductive lines and a third conductive line can extend in the second direction parallel to the semiconductor substrate on a second side of the plurality of first conductive lines opposite the first side of the plurality of first conductive lines. A plurality of first non-volatile memory cells can be on the first side of the plurality of first conductive lines and each can be coupled to the second conductive line and to a respective one of the plurality of first conductive lines, where each of the plurality of first non-volatile memory cells can include a switching element, a variable resistance element, and an electrode arranged in a first sequence. A plurality of second non-volatile memory cells can be on the second side of the plurality of first conductive lines and each can be coupled to the third conductive line and to a respective one of the plurality of first conductive lines, wherein each of the plurality of second non-volatile memory cells includes a switching element, a variable resistance element, and an electrode that are arranged in a second sequence, wherein the first sequence and the second sequence are symmetrical with one another about the plurality of first conductive lines.

Description

[0001] This patent application claims Korean Patent Application No. 10-2018-0082678 filed with the Korean Intellectual Property Office on July 17, 2018 and U.S. Patent No. 16 / 354,545 filed with the United States Patent and Trademark Office on March 15, 2019 priority of the application, the disclosures of these patent applications are hereby incorporated by reference in their entirety. technical field [0002] Embodiments of the inventive concept relate to variable resistance nonvolatile memory devices, and more particularly, to variable resistance nonvolatile memory devices including three-dimensionally arranged memory cells. Background technique [0003] Semiconductor devices have been highly integrated to provide excellent performance and low manufacturing cost. The integration density of a semiconductor device directly affects the cost of the semiconductor device, thereby causing a demand for highly integrated semiconductor devices. The integration density of a typical t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11568H01L27/11582H10B43/30H10B43/27
CPCH10B43/30H10B43/27H10B63/24H10B63/845H10B63/20H10N70/823H10N70/231H10N70/882H10N70/8828H10N70/066H10N70/821H10N70/841H10B63/84H10B63/80H10N70/021
Inventor 殷圣豪姜大焕金成元金英培元硕载
Owner SAMSUNG ELECTRONICS CO LTD
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