N-M AXI bus controller and configurable arbitration mechanism implementation method thereof

An N-MAXI, bus controller technology, applied in the direction of instruments, electrical digital data processing, etc., can solve the problem of the inability to achieve flexible priority configuration of multiple SLAVE slave devices, and the inability to achieve flexible priority configuration of multiple MASTER master devices. Flexibility, efficiency and other issues, to achieve the effect of design reusability, simplifying design complexity, and reducing design difficulty

Active Publication Date: 2020-02-07
SHANDONG SINOCHIP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, most of the system buses adopt the mode of single address channel and multiple data channels. The arbitration mechanism is exactly the same for all master and slave devices in the bus controller: for the slave interface, it is impossible to realize the flexible configuration of the priority of multiple MASTER master devices; for The host interface cannot realize the flexible configuration of the priority of multiple SLAVE slave devices
This single priority configuration limits the flexibility and efficiency of the N-M working mode in the AXI bus interconnection network

Method used

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  • N-M AXI bus controller and configurable arbitration mechanism implementation method thereof
  • N-M AXI bus controller and configurable arbitration mechanism implementation method thereof
  • N-M AXI bus controller and configurable arbitration mechanism implementation method thereof

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Embodiment 1

[0023] This embodiment discloses a N-M AXI bus controller based on a configurable arbitration mechanism, such as figure 1 As shown, xbus_rgt_cfg module, xbus_lite_if module and xbus_mst_arb module. xbus_rgt_cfg is the internal configuration module of the bus control, which exists as a generalized SLAVE in the bus controller, and the external master controls the functional characteristics of the bus controller through this module, and the arbitration priority vector of each master-slave device implemented in the present invention That is, after configuring this module, it is exported to the full interconnection; xbus_lite_if is responsible for converting slave instructions and data into lite mode, used to connect with lite_slv, and only used when connecting to lite slave; xbus_mst_arb is an N-M full interconnection implementation module, responsible for arbitration The command of the external master is authorized to the corresponding master through punching, and the command is ...

Embodiment 2

[0031] This embodiment discloses a method for realizing a configurable arbitration mechanism of an N-M AXI bus controller. In this method, N masters and M slaves connected to the AXI bus controller are all configured with arbitration priority vectors, and all arbitration priority vectors All can be configured independently, the arbitration priority vector of each slave is used for the arbitration of the read command channel and the write command channel, in which the write data channel is attached to the write command channel, and the arbitration priority vector of each master is used for reading data Arbitration of channels and write response channels.

[0032] In this embodiment, for the read command channel, the write command channel, the read data channel and the write response channel, the signals participating in the arbitration are respectively the empty and full signals of the FIFOs on the corresponding channels. Specifically, the arbitration participation signal on th...

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Abstract

The invention discloses an N-M AXI bus controller and a configurable arbitration mechanism implementation method thereof. The bus controller comprises an xbus _ rgt _ cfg module and an xbus _ mst _ arb module. The xbus _ rgt _ cfg module is used for configuring an independent arbitration priority vector for each host and each slave connected with the xbus _ mst _ arb module. All arbitration priority vectors can be independently configured, the arbitration priority vector to which each slave belongs is used for arbitration of a read instruction channel and a write instruction channel, the writedata channel is attached to the write instruction channel, and the arbitration priority vector to which each host belongs is used for arbitration of the read data channel and the write response channel. According to the invention, an optimal arbitration priority vector to which each master device and each slave device belong independently is configured for each master device and each slave devicein the system, so that optimal transmission can be realized by each master device and each slave device.

Description

technical field [0001] The invention relates to an N-M AXI bus controller based on a configurable arbitration mechanism and a method for realizing the configurable arbitration mechanism of the controller, belonging to the technical field of the AXI bus. Background technique [0002] The AXI system bus is the controller in the AXI bus system, which connects multiple AXI MASTER master devices to multiple AXISLAVE slave devices, and realizes address and data transmission between multiple memory-mapped devices. At present, most of the system buses adopt the mode of single address channel and multiple data channels. The arbitration mechanism is exactly the same for all master and slave devices in the bus controller: for the slave interface, it is impossible to realize the flexible configuration of the priority of multiple MASTER master devices; for The host interface cannot realize the flexible configuration of the priority of multiple SLAVE slave devices. This single priority c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40
CPCG06F13/4031Y02D10/00
Inventor 刘尚孙中琳刘大铕朱苏雁刘奇浩王运哲
Owner SHANDONG SINOCHIP SEMICON
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