Bit judgment method, memory control circuit unit and memory storage device

A technology of storage unit and control circuit, which is applied in the direction of response error generation and redundant code error detection, etc., can solve the problems of bit error rate decoding convergence speed reduction and decoding failure, etc.

Pending Publication Date: 2020-02-14
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In general, when LDPC decoding is performed using bits belonging to HRE (hereinafter referred to as HRE bits), it will result in an error floor region of the bit error rate and a decrease in the decoding converging speed of the decoder. , which in turn may cause the decoding to fail

Method used

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  • Bit judgment method, memory control circuit unit and memory storage device
  • Bit judgment method, memory control circuit unit and memory storage device
  • Bit judgment method, memory control circuit unit and memory storage device

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Embodiment Construction

[0124] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module (rewritable non-volatile memory module) and a controller (also called a control circuit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0125] figure 1 It is a schematic diagram showing a host system, a memory storage device and an input / output (I / O) device according to an exemplary embodiment of the present invention. figure 2 It is a schematic diagram showing a host system, a memory storage device and an I / O device according to another exemplary embodiment of the present invention.

[0126] Please refer to figure 1 and figure 2 , the host system 11 generally includes a processor 111 , a random access memory (random access memory, RAM) 112 , a read only memory (read only memory, ROM) 113 and a data transmission interface 114 . The...

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Abstract

The invention provides a bit judgment method, a memory control circuit unit and a memory storage device. The method comprises the following steps: reading a first storage state of a first storage unitto obtain a first numerical value of a first effective bit; reading a first storage state of the first storage unit to obtain a second numerical value of a second effective bit; performing a first decoding operation according to the second value to obtain a third value of the decoded second significant bit; judging whether the first effective bit is a special bit or not according to the first storage state and a second storage state corresponding to the third numerical value; and when the first valid bit is the special bit, executing a corresponding decoding operation.

Description

technical field [0001] The invention relates to a bit judging method, a memory control circuit unit and a memory storage device. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built in the various memory modules listed above. in portable multimedia devices. [0003] Generally, in order to ensure the correctness of the data stored in the rewritable non-volatile memory module, before storing certain data in the rewritable non-volatile memory module, the data will be encoded first. The encoded data (including original data and error correction code) will be stored in a rewritable non-volatile memory module. Later, the encoded data can be r...

Claims

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Application Information

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IPC IPC(8): G06F11/10
CPCG06F11/10
Inventor 林纬刘安城杨宇翔许祐诚
Owner PHISON ELECTRONICS
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