Design method, device, equipment and medium of clock tree structure of system on chip

Abstract

The present invention provides a design method, device, device and medium of a system-on-chip clock tree structure, wherein the design method includes: determining the maximum number of registers that are allowed to be turned on simultaneously in the system-on-chip; grouping all registers in the system-on-chip , to obtain a plurality of register groups; wherein, the number of registers in each register group is less than or equal to the maximum number; for each register group, clock tree design is performed on each register in the register group, and the clock tree of each register group is obtained; Connect the clock tree of each register group to the main clock path of the system-on-chip; adjust the clock length of the clock signal on the main clock path to each register group according to the clock length of each clock tree; wherein, the clock signal reaches each register group The clock lengths of are different from each other. The invention can reduce the number of registers flipped at the same time, effectively reduce the instantaneous power consumption of the on-chip system, and reduce the impact on the power supply.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a design method, device, equipment and medium of a clock tree structure of a system on chip. Background technique [0002] During the working process of the system on chip, the power supply of the system on chip is not stable, but changes continuously with the working state of the system on chip over time. When the instantaneous power consumption of the system on chip is too large, it will affect the stability of the power supply and cause the power supply voltage to be pulled down. If the power supply voltage is too low, it may even cause logic errors. In order to avoid this kind of problem, it is necessary to put forward higher design requirements for the driving capability of the power supply, the response time of the output voltage, etc.; to put forward higher requirements for the load capacitance and the distributed coupling capacitance of the on-chip system, whi...

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a design method, device, equipment and medium of a clock tree structure of a system on chip, the purpose of which is to solve the problem of simultaneous flipping of all registers in the system on chip, large instantaneous power consumption, and impact on the power supply

Images