A power semiconductor module packaging structure

Abstract

The invention discloses a package structure of a power semiconductor module, which is characterized in that it comprises a substrate; a casing, the casing is fastened to the substrate; and a power semiconductor module subunit is arranged between the casing and the substrate. In the accommodation space formed by the substrate, it is used to form a topology control circuit structure. The power semiconductor module subunit includes a plurality of backing boards arranged at intervals on the substrate, and the main power terminal is passed between the two facing backing boards. It is connected with the module-level bonding wire, and the top of the main power terminal extends out of the top of the housing; the auxiliary terminal is used to introduce the driving signal into the power semiconductor module subunit, and the bottom pin of the auxiliary terminal Connected with the liner, the top of the auxiliary terminal extends out of the top of the housing. The invention can improve the heat dissipation efficiency of the power semiconductor module, balance parasitic inductance or resistance parameters, improve the consistency of the process, have low loss and good reliability.

Description

technical field [0001] The invention relates to a packaging structure of a power semiconductor module, which belongs to the field of semiconductor devices. Background technique [0002] Users of power semiconductor modules expect power modules to be able to increase output power with smaller volume and lower price. The increase in power density poses various challenges for power semiconductor chips and corresponding packaging. For different application scenarios, a variety of new packaging solutions are accompanied by the rapid development of power semiconductor chip technology, packaging materials, packaging processes, and packaging design. [0003] However, since the existing power semiconductor chip manufacturing technology is still unable to directly manufacture single-chip chips to meet the power requirements of users, the parallel connection of multiple chips has become a typical way to meet high power requirements. However, with the increase in the number of paralle...

AI Technical Summary

Problems solved by technology

[0003] However, since the existing power semiconductor chip manufacturing technology is still unable to directly manufacture single-chip chips to meet the power requirements of users, the use of multi-chip parallel connection has become a typical way to meet high power requirements

However, with the increase in the number of parallel-connected power semiconductor chips, current sharing, heat dissipation, thermal stress, and reliability inside the power semiconductor module have become important challenges that affect the reliable use of power semiconductor modules.

Furthermore, with the increase in the number of power semiconductor chips, the production process of power semiconductor modules requires higher precision and consistency, resulting in increased process complexity

At the same time, the product yield will be affected by the inconsistency and process inconsistency brought about by the excessive number of chips, which reduces the reliability of the entire power semiconductor module and the uniformity between power semiconductor modules

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